From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sun, 4 Nov 2018 02:27:48 +0000 (+0000)
Subject: set isvec when predication enabled
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6514a7a0bd17fcd1c4e4b8f4456abbd0a2a2688d;p=riscv-isa-sim.git

set isvec when predication enabled
---

diff --git a/riscv/sv.cc b/riscv/sv.cc
index 75dac8a..60fd665 100644
--- a/riscv/sv.cc
+++ b/riscv/sv.cc
@@ -244,7 +244,7 @@ reg_spec_t sv_insn_t::predicated(reg_spec_t const& spec, uint64_t pred)
     fprintf(stderr, "predication %ld %d %lx\n", spec.reg, (*spec.offset), pred);
     res.reg = 0;
     res.offset = 0;
-    res.isvec = false;
+    res.isvec = spec.isvec;
     return res;
 }