From: Rob Clark Date: Fri, 9 Dec 2016 18:10:03 +0000 (-0500) Subject: freedreno/a5xx: fix (at least some) vtx formats X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=651f2655a86d430bdb79b5562295c2fa44c9b6ff;p=mesa.git freedreno/a5xx: fix (at least some) vtx formats Swap/component-order doesn't seem to be quite what that is. At least blob was always setting it to XYZW ('11') but we weren't. Causing problems w/ formats like sint16.. Hard-coding this instead at least seems to get glamor working. Signed-off-by: Rob Clark --- diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_emit.c b/src/gallium/drivers/freedreno/a5xx/fd5_emit.c index 57edb90dd81..35ecb61d24d 100644 --- a/src/gallium/drivers/freedreno/a5xx/fd5_emit.c +++ b/src/gallium/drivers/freedreno/a5xx/fd5_emit.c @@ -219,7 +219,7 @@ fd5_emit_vertex_bufs(struct fd_ringbuffer *ring, struct fd5_emit *emit) OUT_PKT4(ring, REG_A5XX_VFD_DECODE(j), 2); OUT_RING(ring, A5XX_VFD_DECODE_INSTR_IDX(j) | A5XX_VFD_DECODE_INSTR_FORMAT(fmt) | - A5XX_VFD_DECODE_INSTR_SWAP(fd5_pipe2swap(pfmt))); + 0xc0000000); // XXX OUT_RING(ring, MAX2(1, elem->instance_divisor)); /* VFD_DECODE[j].STEP_RATE */ OUT_PKT4(ring, REG_A5XX_VFD_DEST_CNTL(j), 1);