From: Jacob Lifshay Date: Fri, 20 Oct 2023 23:00:41 +0000 (-0700) Subject: don't generate misleading log messages setting unimplemented SPRs to zero X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6521a032629e493db091860c690b3487ea142a6c;p=openpower-isa.git don't generate misleading log messages setting unimplemented SPRs to zero turns out they're generated by calling caller.SPR.__getitem__ --- diff --git a/src/openpower/test/state.py b/src/openpower/test/state.py index d32f4b3e..a8483dda 100644 --- a/src/openpower/test/state.py +++ b/src/openpower/test/state.py @@ -403,7 +403,16 @@ class SimState(State): self.sim.spr['SRR0'] = 0 self.sim.spr['SRR1'] = 0 - self.sprs[spr] = self.sim.spr[spr.name] # setitem converts to int + # avoid accessing SPRs that aren't used/implemented + # this avoids printing a bunch of messages like: + # setting spr TFHAR SelectableInt(value=0x0, bits=64) + # setting spr TFIAR SelectableInt(value=0x0, bits=64) + # setting spr TEXASR SelectableInt(value=0x0, bits=64) + # setting spr TEXASRU SelectableInt(value=0x0, bits=32) + if (spr.name in self.sim.spr or spr.value in self.sim.spr + or spr.name in ('HSRR0', 'HSRR1')): + # setitem converts to int + self.sprs[spr] = self.sim.spr[spr.name] if clear_srr: self.sim.spr['SRR0'] = old_srr0