From: lkcl <lkcl@web>
Date: Fri, 22 Nov 2019 18:58:29 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~3835
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=65292881e3605644c1b8a0b0b0e4757d6be9fbea;p=libreriscv.git

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+# Questions
+
+Dear Frieder,
+
+you applied to the 2019-10 open call from NLnet. We have some questions
+regarding your project Port of AMDVLK/RADV 3D Driver to the Libre RISC-V
+SoC.
+
+Can you provide a breakdown of the budget in each of the three stages,
+and what rates did you use to arrive at the budget of 50k? Will you be
+working on this project individually?
+
+What happens in stage two if you find everything is *not* properly
+functional? Will you able to identify and fix issues yourself, or are
+you dependent on others? If so, do you think these people are friendly
+to the effort?
+
+How do you see future synchronisation with the evolving AMD code,
+assuming this is still actively developed?