From: Neel <neelgala@gmail.com>
Date: Thu, 29 Mar 2018 15:49:49 +0000 (+0530)
Subject: creating a single rule to assign function inputs from IOs based on mux lines
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6581aeb82a869d6e58f001700c9e4cbdbc71dc90;p=pinmux.git

creating a single rule to assign function inputs from IOs based on mux lines
---

diff --git a/src/bsv/actual_pinmux.py b/src/bsv/actual_pinmux.py
index 7dd3665..2db4418 100644
--- a/src/bsv/actual_pinmux.py
+++ b/src/bsv/actual_pinmux.py
@@ -10,10 +10,8 @@ except ImportError:
 # second argument is the mux value.
 # Third argument is the signal from the pinmap file
 mux_wire = '''
-      rule assign_{2}_on_cell{0}(wrcell{0}_mux=={1});
-        {2}<=cell{0}_mux_in;
-      endrule
-'''
+        if(wrcell{0}_mux=={1})
+            {2}<=cell{0}_mux_in;'''
 dedicated_wire = '''
       rule assign_{1}_on_cell{0};
         {1}<=cell{0}_mux_in;
@@ -47,11 +45,13 @@ def init(p, ifaces):
         p.pinmux += ";\n"
         # ======================================================== #
 
-        # check each cell if "peripheral input/inout" then assign its wire
-        # Here we check the direction of each signal in the dictionary.
-        # We choose to keep the dictionary within the code and not user-input
-        # since the interfaces are always standard and cannot change from
-        # user-to-user. Plus this also reduces human-error as well :)
+    # check each cell if "peripheral input/inout" then assign its wire
+    # Here we check the direction of each signal in the dictionary.
+    # We choose to keep the dictionary within the code and not user-input
+    # since the interfaces are always standard and cannot change from
+    # user-to-user. Plus this also reduces human-error as well :)
+    p.pinmux += "      rule assign_inputs_from_io_to_wires;"
+    for cell in p.muxed_cells:
         for i in range(0, len(cell) - 1):
             cname = cell[i + 1]
             temp = transfn(cname)
@@ -68,6 +68,7 @@ def init(p, ifaces):
                 p.pinmux += \
                     mux_wire.format(cell[0], i, "wr" + cname +
                                                 "_in") + "\n"
+    p.pinmux += "      endrule\n"
     # ============================================================ #
 
     # ==================  Logic for dedicated pins ========= #