From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sun, 14 Feb 2021 13:03:13 +0000 (+0000)
Subject: add Regfiles comments
X-Git-Tag: convert-csv-opcode-to-binary~231^2~7
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6588eb42c4ba417ba486d25151954c570c52d39d;p=soc.git

add Regfiles comments
---

diff --git a/src/soc/regfile/regfiles.py b/src/soc/regfile/regfiles.py
index 27aaecb9..aec56e44 100644
--- a/src/soc/regfile/regfiles.py
+++ b/src/soc/regfile/regfiles.py
@@ -178,6 +178,7 @@ class SPRRegs(RegFileMem):
 class RegFiles:
     def __init__(self):
         self.rf = {}
+        # create regfiles here, Factory style
         for (name, kls) in [('int', IntRegs),
                             ('cr', CRRegs),
                             ('xer', XERRegs),
@@ -185,6 +186,7 @@ class RegFiles:
                             ('state', StateRegs),
                             ('spr', SPRRegs),]:
             rf = self.rf[name] = kls()
+            # also add these as instances, self.state, self.fast, self.cr etc.
             setattr(self, name, rf)
 
     def elaborate_into(self, m, platform):