From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Fri, 6 Mar 2015 09:20:26 +0000 (+0100)
Subject: platforms/sim: add ethernet pins
X-Git-Tag: 24jan2021_ls180~2099^2~210
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=658d4d4c49085ae0e4225a9915b709576d202e09;p=litex.git

platforms/sim: add ethernet pins
---

diff --git a/mibuild/platforms/sim.py b/mibuild/platforms/sim.py
index db48ec2c..64b03203 100644
--- a/mibuild/platforms/sim.py
+++ b/mibuild/platforms/sim.py
@@ -14,6 +14,18 @@ _io = [
 		Subsignal("source_ack", SimPins(1)),
 		Subsignal("source_data", SimPins(8)),
 
+		Subsignal("sink_stb", SimPins(1)),
+		Subsignal("sink_ack", SimPins(1)),
+		Subsignal("sink_data", SimPins(8)),
+	),
+	("eth_clocks", 0,
+		Subsignal("none", SimPins(1)),
+	),
+	("eth", 0,
+		Subsignal("source_stb", SimPins(1)),
+		Subsignal("source_ack", SimPins(1)),
+		Subsignal("source_data", SimPins(8)),
+
 		Subsignal("sink_stb", SimPins(1)),
 		Subsignal("sink_ack", SimPins(1)),
 		Subsignal("sink_data", SimPins(8)),