From: Tom Stellard <thomas.stellard@amd.com>
Date: Wed, 30 May 2012 23:23:39 +0000 (-0400)
Subject: radeon/llvm: Change prefix on tablegen files to AMDGPU
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=65917004d99ccb79f709e621f8f6cf66715ffdca;p=mesa.git

radeon/llvm: Change prefix on tablegen files to AMDGPU
---

diff --git a/src/gallium/drivers/radeon/AMDGPU.td b/src/gallium/drivers/radeon/AMDGPU.td
new file mode 100644
index 00000000000..28d4182ddc6
--- /dev/null
+++ b/src/gallium/drivers/radeon/AMDGPU.td
@@ -0,0 +1,20 @@
+//===-- AMDIL.td - AMDIL Tablegen files --*- tablegen -*-------------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//==-----------------------------------------------------------------------===//
+// This file specifies where the base TD file exists
+// and where the version specific TD file exists.
+include "AMDILBase.td"
+include "AMDILVersion.td"
+
+include "R600Schedule.td"
+include "SISchedule.td"
+include "Processors.td"
+include "AMDGPUInstrInfo.td"
+include "AMDGPUIntrinsics.td"
+include "AMDGPURegisterInfo.td"
+include "AMDGPUInstructions.td"
diff --git a/src/gallium/drivers/radeon/AMDIL.h b/src/gallium/drivers/radeon/AMDIL.h
index 8bd024a4bd8..4029f2780db 100644
--- a/src/gallium/drivers/radeon/AMDIL.h
+++ b/src/gallium/drivers/radeon/AMDIL.h
@@ -105,9 +105,9 @@ extern Target TheAMDGPUTarget;
 } // end namespace llvm;
 
 #define GET_REGINFO_ENUM
-#include "AMDILGenRegisterInfo.inc"
+#include "AMDGPUGenRegisterInfo.inc"
 #define GET_INSTRINFO_ENUM
-#include "AMDILGenInstrInfo.inc"
+#include "AMDGPUGenInstrInfo.inc"
 
 /// Include device information enumerations
 #include "AMDILDeviceInfo.h"
diff --git a/src/gallium/drivers/radeon/AMDIL.td b/src/gallium/drivers/radeon/AMDIL.td
deleted file mode 100644
index 28d4182ddc6..00000000000
--- a/src/gallium/drivers/radeon/AMDIL.td
+++ /dev/null
@@ -1,20 +0,0 @@
-//===-- AMDIL.td - AMDIL Tablegen files --*- tablegen -*-------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//==-----------------------------------------------------------------------===//
-// This file specifies where the base TD file exists
-// and where the version specific TD file exists.
-include "AMDILBase.td"
-include "AMDILVersion.td"
-
-include "R600Schedule.td"
-include "SISchedule.td"
-include "Processors.td"
-include "AMDGPUInstrInfo.td"
-include "AMDGPUIntrinsics.td"
-include "AMDGPURegisterInfo.td"
-include "AMDGPUInstructions.td"
diff --git a/src/gallium/drivers/radeon/AMDILISelDAGToDAG.cpp b/src/gallium/drivers/radeon/AMDILISelDAGToDAG.cpp
index 40b35fd45de..b14a360c3cc 100644
--- a/src/gallium/drivers/radeon/AMDILISelDAGToDAG.cpp
+++ b/src/gallium/drivers/radeon/AMDILISelDAGToDAG.cpp
@@ -71,7 +71,7 @@ private:
   bool SelectADDRReg(SDValue Addr, SDValue& Base, SDValue& Offset);
 
   // Include the pieces autogenerated from the target description.
-#include "AMDILGenDAGISel.inc"
+#include "AMDGPUGenDAGISel.inc"
 };
 }  // end anonymous namespace
 
diff --git a/src/gallium/drivers/radeon/AMDILISelLowering.cpp b/src/gallium/drivers/radeon/AMDILISelLowering.cpp
index a52c83e5790..afb9170cdd2 100644
--- a/src/gallium/drivers/radeon/AMDILISelLowering.cpp
+++ b/src/gallium/drivers/radeon/AMDILISelLowering.cpp
@@ -38,7 +38,7 @@ using namespace llvm;
 //===----------------------------------------------------------------------===//
 // Calling Convention Implementation
 //===----------------------------------------------------------------------===//
-#include "AMDILGenCallingConv.inc"
+#include "AMDGPUGenCallingConv.inc"
 
 //===----------------------------------------------------------------------===//
 // TargetLowering Implementation Help Functions Begin
diff --git a/src/gallium/drivers/radeon/AMDILInstrInfo.cpp b/src/gallium/drivers/radeon/AMDILInstrInfo.cpp
index 0ac56b5186d..5143f3fd8fc 100644
--- a/src/gallium/drivers/radeon/AMDILInstrInfo.cpp
+++ b/src/gallium/drivers/radeon/AMDILInstrInfo.cpp
@@ -22,7 +22,7 @@
 #include "llvm/Instructions.h"
 
 #define GET_INSTRINFO_CTOR
-#include "AMDILGenInstrInfo.inc"
+#include "AMDGPUGenInstrInfo.inc"
 
 using namespace llvm;
 
diff --git a/src/gallium/drivers/radeon/AMDILInstrInfo.h b/src/gallium/drivers/radeon/AMDILInstrInfo.h
index 9de16ed8e59..6aa03e713ae 100644
--- a/src/gallium/drivers/radeon/AMDILInstrInfo.h
+++ b/src/gallium/drivers/radeon/AMDILInstrInfo.h
@@ -18,7 +18,7 @@
 #include "llvm/Target/TargetInstrInfo.h"
 
 #define GET_INSTRINFO_HEADER
-#include "AMDILGenInstrInfo.inc"
+#include "AMDGPUGenInstrInfo.inc"
 
 namespace llvm {
   // AMDIL - This namespace holds all of the target specific flags that
diff --git a/src/gallium/drivers/radeon/AMDILIntrinsicInfo.cpp b/src/gallium/drivers/radeon/AMDILIntrinsicInfo.cpp
index 651c0549413..678e32e8d10 100644
--- a/src/gallium/drivers/radeon/AMDILIntrinsicInfo.cpp
+++ b/src/gallium/drivers/radeon/AMDILIntrinsicInfo.cpp
@@ -21,7 +21,7 @@
 using namespace llvm;
 
 #define GET_LLVM_INTRINSIC_FOR_GCC_BUILTIN
-#include "AMDILGenIntrinsics.inc"
+#include "AMDGPUGenIntrinsics.inc"
 #undef GET_LLVM_INTRINSIC_FOR_GCC_BUILTIN
 
 AMDILIntrinsicInfo::AMDILIntrinsicInfo(TargetMachine *tm) 
@@ -35,7 +35,7 @@ AMDILIntrinsicInfo::getName(unsigned int IntrID, Type **Tys,
 {
   static const char* const names[] = {
 #define GET_INTRINSIC_NAME_TABLE
-#include "AMDILGenIntrinsics.inc"
+#include "AMDGPUGenIntrinsics.inc"
 #undef GET_INTRINSIC_NAME_TABLE
   };
 
@@ -107,7 +107,7 @@ unsigned int
 AMDILIntrinsicInfo::lookupName(const char *Name, unsigned int Len) const 
 {
 #define GET_FUNCTION_RECOGNIZER
-#include "AMDILGenIntrinsics.inc"
+#include "AMDGPUGenIntrinsics.inc"
 #undef GET_FUNCTION_RECOGNIZER
   AMDGPUIntrinsic::ID IntrinsicID
     = (AMDGPUIntrinsic::ID)Intrinsic::not_intrinsic;
@@ -132,13 +132,13 @@ AMDILIntrinsicInfo::isOverloaded(unsigned id) const
 {
   // Overload Table
 #define GET_INTRINSIC_OVERLOAD_TABLE
-#include "AMDILGenIntrinsics.inc"
+#include "AMDGPUGenIntrinsics.inc"
 #undef GET_INTRINSIC_OVERLOAD_TABLE
 }
 
 /// This defines the "getAttributes(ID id)" method.
 #define GET_INTRINSIC_ATTRIBUTES
-#include "AMDILGenIntrinsics.inc"
+#include "AMDGPUGenIntrinsics.inc"
 #undef GET_INTRINSIC_ATTRIBUTES
 
 Function*
diff --git a/src/gallium/drivers/radeon/AMDILIntrinsicInfo.h b/src/gallium/drivers/radeon/AMDILIntrinsicInfo.h
index bdd0366fd1c..072c26531d1 100644
--- a/src/gallium/drivers/radeon/AMDILIntrinsicInfo.h
+++ b/src/gallium/drivers/radeon/AMDILIntrinsicInfo.h
@@ -22,7 +22,7 @@ namespace llvm {
     enum ID {
       last_non_AMDIL_intrinsic = Intrinsic::num_intrinsics - 1,
 #define GET_INTRINSIC_ENUM_VALUES
-#include "AMDILGenIntrinsics.inc"
+#include "AMDGPUGenIntrinsics.inc"
 #undef GET_INTRINSIC_ENUM_VALUES
       , num_AMDIL_intrinsics
     };
diff --git a/src/gallium/drivers/radeon/AMDILRegisterInfo.cpp b/src/gallium/drivers/radeon/AMDILRegisterInfo.cpp
index 9d93b91f000..af2113b1526 100644
--- a/src/gallium/drivers/radeon/AMDILRegisterInfo.cpp
+++ b/src/gallium/drivers/radeon/AMDILRegisterInfo.cpp
@@ -198,5 +198,5 @@ AMDILRegisterInfo::getStackSize() const
 }
 
 #define GET_REGINFO_TARGET_DESC
-#include "AMDILGenRegisterInfo.inc"
+#include "AMDGPUGenRegisterInfo.inc"
 
diff --git a/src/gallium/drivers/radeon/AMDILRegisterInfo.h b/src/gallium/drivers/radeon/AMDILRegisterInfo.h
index 8dd4281d6a5..7627bdec045 100644
--- a/src/gallium/drivers/radeon/AMDILRegisterInfo.h
+++ b/src/gallium/drivers/radeon/AMDILRegisterInfo.h
@@ -17,7 +17,7 @@
 #include "llvm/Target/TargetRegisterInfo.h"
 
 #define GET_REGINFO_HEADER
-#include "AMDILGenRegisterInfo.inc"
+#include "AMDGPUGenRegisterInfo.inc"
 // See header file for explanation
 
 namespace llvm
diff --git a/src/gallium/drivers/radeon/AMDILSubtarget.cpp b/src/gallium/drivers/radeon/AMDILSubtarget.cpp
index 249cb03f4a3..723037e2e72 100644
--- a/src/gallium/drivers/radeon/AMDILSubtarget.cpp
+++ b/src/gallium/drivers/radeon/AMDILSubtarget.cpp
@@ -25,7 +25,7 @@ using namespace llvm;
 #define GET_SUBTARGETINFO_ENUM
 #define GET_SUBTARGETINFO_CTOR
 #define GET_SUBTARGETINFO_TARGET_DESC
-#include "AMDILGenSubtargetInfo.inc"
+#include "AMDGPUGenSubtargetInfo.inc"
 
 AMDILSubtarget::AMDILSubtarget(llvm::StringRef TT, llvm::StringRef CPU, llvm::StringRef FS) : AMDILGenSubtargetInfo( TT, CPU, FS ),
   mDumpCode(false)
diff --git a/src/gallium/drivers/radeon/AMDILSubtarget.h b/src/gallium/drivers/radeon/AMDILSubtarget.h
index 38fcb859ac6..e3d8c814d0a 100644
--- a/src/gallium/drivers/radeon/AMDILSubtarget.h
+++ b/src/gallium/drivers/radeon/AMDILSubtarget.h
@@ -22,7 +22,7 @@
 #include <string>
 
 #define GET_SUBTARGETINFO_HEADER
-#include "AMDILGenSubtargetInfo.inc"
+#include "AMDGPUGenSubtargetInfo.inc"
 
 #define MAX_CB_SIZE (1 << 16)
 namespace llvm {
diff --git a/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCTargetDesc.cpp b/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCTargetDesc.cpp
index 3488d708e8c..52c5faa6930 100644
--- a/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCTargetDesc.cpp
+++ b/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCTargetDesc.cpp
@@ -9,13 +9,13 @@
 #include "llvm/Support/TargetRegistry.h"
 
 #define GET_INSTRINFO_MC_DESC
-#include "AMDILGenInstrInfo.inc"
+#include "AMDGPUGenInstrInfo.inc"
 
 #define GET_SUBTARGETINFO_MC_DESC
-#include "AMDILGenSubtargetInfo.inc"
+#include "AMDGPUGenSubtargetInfo.inc"
 
 #define GET_REGINFO_MC_DESC
-#include "AMDILGenRegisterInfo.inc"
+#include "AMDGPUGenRegisterInfo.inc"
 
 using namespace llvm;
 
diff --git a/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCTargetDesc.h b/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCTargetDesc.h
index 8951a4e6461..2eab136e67a 100644
--- a/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCTargetDesc.h
+++ b/src/gallium/drivers/radeon/MCTargetDesc/AMDILMCTargetDesc.h
@@ -24,12 +24,12 @@ extern Target TheAMDGPUTarget;
 } // End llvm namespace
 
 #define GET_REGINFO_ENUM
-#include "AMDILGenRegisterInfo.inc"
+#include "AMDGPUGenRegisterInfo.inc"
 
 #define GET_INSTRINFO_ENUM
-#include "AMDILGenInstrInfo.inc"
+#include "AMDGPUGenInstrInfo.inc"
 
 #define GET_SUBTARGETINFO_ENUM
-#include "AMDILGenSubtargetInfo.inc"
+#include "AMDGPUGenSubtargetInfo.inc"
 
 #endif // AMDILMCTARGETDESC_H
diff --git a/src/gallium/drivers/radeon/Makefile b/src/gallium/drivers/radeon/Makefile
index 3f930cd2784..db5dbaa0819 100644
--- a/src/gallium/drivers/radeon/Makefile
+++ b/src/gallium/drivers/radeon/Makefile
@@ -38,32 +38,32 @@ endif
 R600RegisterInfo.td: R600GenRegisterInfo.pl
 	$(PERL) $^ > $@
 
-AMDILGenRegisterInfo.inc: *.td
-	$(call tablegen, -gen-register-info, AMDIL.td, $@)
+AMDGPUGenRegisterInfo.inc: *.td
+	$(call tablegen, -gen-register-info, AMDGPU.td, $@)
 
-AMDILGenInstrInfo.inc: *.td
-	$(call tablegen, -gen-instr-info, AMDIL.td, $@)
+AMDGPUGenInstrInfo.inc: *.td
+	$(call tablegen, -gen-instr-info, AMDGPU.td, $@)
 
-AMDILGenAsmWriter.inc: *.td
-	$(call tablegen, -gen-asm-writer, AMDIL.td, $@)
+AMDGPUGenAsmWriter.inc: *.td
+	$(call tablegen, -gen-asm-writer, AMDGPU.td, $@)
 
-AMDILGenDAGISel.inc: *.td
-	$(call tablegen, -gen-dag-isel, AMDIL.td, $@)
+AMDGPUGenDAGISel.inc: *.td
+	$(call tablegen, -gen-dag-isel, AMDGPU.td, $@)
 
-AMDILGenCallingConv.inc: *.td
-	$(call tablegen, -gen-callingconv, AMDIL.td, $@)
+AMDGPUGenCallingConv.inc: *.td
+	$(call tablegen, -gen-callingconv, AMDGPU.td, $@)
 
-AMDILGenSubtargetInfo.inc: *.td
-	$(call tablegen, -gen-subtarget, AMDIL.td, $@)
+AMDGPUGenSubtargetInfo.inc: *.td
+	$(call tablegen, -gen-subtarget, AMDGPU.td, $@)
 
-AMDILGenEDInfo.inc: *.td
-	$(call tablegen, -gen-enhanced-disassembly-info, AMDIL.td, $@)
+AMDGPUGenEDInfo.inc: *.td
+	$(call tablegen, -gen-enhanced-disassembly-info, AMDGPU.td, $@)
 
-AMDILGenIntrinsics.inc: *.td
-	$(call tablegen, -gen-tgt-intrinsic, AMDIL.td, $@)
+AMDGPUGenIntrinsics.inc: *.td
+	$(call tablegen, -gen-tgt-intrinsic, AMDGPU.td, $@)
 
-AMDILGenCodeEmitter.inc: *.td
-	$(call tablegen, -gen-emitter, AMDIL.td, $@)
+AMDGPUGenCodeEmitter.inc: *.td
+	$(call tablegen, -gen-emitter, AMDGPU.td, $@)
 
 LOADER_LIBS=$(shell llvm-config --libs bitreader asmparser)
 loader: loader.o libradeon.a
diff --git a/src/gallium/drivers/radeon/Makefile.sources b/src/gallium/drivers/radeon/Makefile.sources
index 51eb3aecb4f..7ba09802b6d 100644
--- a/src/gallium/drivers/radeon/Makefile.sources
+++ b/src/gallium/drivers/radeon/Makefile.sources
@@ -4,15 +4,15 @@ GENERATED_SOURCES := \
 	R600RegisterInfo.td		\
 	SIRegisterInfo.td		\
 	SIRegisterGetHWRegNum.inc		\
-	AMDILGenRegisterInfo.inc	\
-	AMDILGenInstrInfo.inc		\
-	AMDILGenAsmWriter.inc		\
-	AMDILGenDAGISel.inc		\
-	AMDILGenCallingConv.inc		\
-	AMDILGenSubtargetInfo.inc		\
-	AMDILGenEDInfo.inc		\
-	AMDILGenIntrinsics.inc		\
-	AMDILGenCodeEmitter.inc
+	AMDGPUGenRegisterInfo.inc	\
+	AMDGPUGenInstrInfo.inc		\
+	AMDGPUGenAsmWriter.inc		\
+	AMDGPUGenDAGISel.inc		\
+	AMDGPUGenCallingConv.inc		\
+	AMDGPUGenSubtargetInfo.inc		\
+	AMDGPUGenEDInfo.inc		\
+	AMDGPUGenIntrinsics.inc		\
+	AMDGPUGenCodeEmitter.inc
 
 CPP_SOURCES := \
 	AMDIL7XXDevice.cpp		\
diff --git a/src/gallium/drivers/radeon/R600CodeEmitter.cpp b/src/gallium/drivers/radeon/R600CodeEmitter.cpp
index e8d0efefff5..fdc79a67499 100644
--- a/src/gallium/drivers/radeon/R600CodeEmitter.cpp
+++ b/src/gallium/drivers/radeon/R600CodeEmitter.cpp
@@ -654,5 +654,5 @@ uint64_t R600CodeEmitter::getMachineOpValue(const MachineInstr &MI,
   }
 }
 
-#include "AMDILGenCodeEmitter.inc"
+#include "AMDGPUGenCodeEmitter.inc"