From: Eddie Hung <eddie@fpgeh.com>
Date: Thu, 22 Aug 2019 21:20:03 +0000 (-0700)
Subject: Spelling
X-Git-Tag: working-ls180~1084^2~21^2~3
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=65e6c23abd9add59b95a024c91d4fff6d15ba135;p=yosys.git

Spelling
---

diff --git a/passes/equiv/equiv_make.cc b/passes/equiv/equiv_make.cc
index dbd8682e6..4855ce29e 100644
--- a/passes/equiv/equiv_make.cc
+++ b/passes/equiv/equiv_make.cc
@@ -532,10 +532,10 @@ struct EquivMakePass : public Pass {
 			log_cmd_error("Equiv module %s already exists.\n", args[argidx+2].c_str());
 
 		if (worker.gold_mod->has_memories() || worker.gold_mod->has_processes())
-			log_cmd_error("Gold module contains memories or procresses. Run 'memory' or 'proc' respectively.\n");
+			log_cmd_error("Gold module contains memories or processes. Run 'memory' or 'proc' respectively.\n");
 
 		if (worker.gate_mod->has_memories() || worker.gate_mod->has_processes())
-			log_cmd_error("Gate module contains memories or procresses. Run 'memory' or 'proc' respectively.\n");
+			log_cmd_error("Gate module contains memories or processes. Run 'memory' or 'proc' respectively.\n");
 
 		worker.read_blacklists();
 		worker.read_encfiles();