From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sat, 26 Feb 2022 14:09:27 +0000 (+0000)
Subject: use dict for lookup of DFI to pads names
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=65fd6521be8da42dc73d64985e3ebd9a33e3e357;p=gram.git

use dict for lookup of DFI to pads names
add ras.reset=1
---

diff --git a/gram/phy/dfi.py b/gram/phy/dfi.py
index 814ad1b..8f76c6d 100644
--- a/gram/phy/dfi.py
+++ b/gram/phy/dfi.py
@@ -45,6 +45,7 @@ class Interface:
             self.phases += [p]
             # set all logic-inverted x_n signal resets to on at power-up
             p.cas.reset = 1
+            p.ras.reset = 1
             p.cs_n.reset = -1
             p.we.reset = 1
             p.act.reset = 1
diff --git a/gram/phy/ecp5ddrphy.py b/gram/phy/ecp5ddrphy.py
index c644edd..ce13c99 100644
--- a/gram/phy/ecp5ddrphy.py
+++ b/gram/phy/ecp5ddrphy.py
@@ -251,11 +251,8 @@ class ECP5DDRPHY(Peripheral, Elaboratable):
             pad = getattr(self.pads, name)
             # sigh, convention in nmigen_boards is "rst" but in
             # dfi.Interface it is "reset"
-            if name == 'rst':
-                name = 'reset_n'
-            # sigh same for cs
-            if name == 'cs':
-                name = 'cs_n'
+            dfi2pads = {'rst': 'reset_n', 'cs': 'cs_n'}
+            name = dfi2pads.get(name, name) # remap if exists
             m.d.comb += [
                 pad.o_clk.eq(ClockSignal("dramsync")),
                 pad.o_fclk.eq(ClockSignal("sync2x")),