From: lkcl <lkcl@web>
Date: Sat, 11 Jun 2022 08:57:03 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~1858
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6699fc483d50eeee9e9599a64c835b0fbd821705;p=libreriscv.git

---

diff --git a/openpower/sv/mv.vec.mdwn b/openpower/sv/mv.vec.mdwn
index 805c45754..c7cc06704 100644
--- a/openpower/sv/mv.vec.mdwn
+++ b/openpower/sv/mv.vec.mdwn
@@ -51,16 +51,6 @@ in this example RA elwidth=32 and RB elwidth=8, RB is a vec4.
          for j in range(SUBVL): # vec4
               start_point[j] = some_op(int_regfile[RB].b[i*SUBVL + j])
 
-RM Mode Concept:
-
-MVRM-2P-2S1D:
-
-| Field Name | Field bits | Description                     |
-|------------|------------|----------------------------|
-| Rdest_EXTRA2 | `10:11`  | extends Rdest (R\*\_EXTRA2 Encoding)   |
-| Rsrc_EXTRA2  | `12:13`  | extends Rsrc  (R\*\_EXTRA2 Encoding)   |
-| src_SUBVL    | `14:15`  | SUBVL for Source              |
-| MASK_SRC     | `16:18`  | Execution Mask for Source     |
 
 
 ## Twin Predication, saturation, swizzle, and elwidth overrides
@@ -155,3 +145,17 @@ Both examples become particularly fun when Twin Predication is thrown
 into the mix.
 
 
+# RM Mode Concept:
+
+MVRM-2P-2S1D:
+
+| Field Name | Field bits | Description                     |
+|------------|------------|----------------------------|
+| Rdest_EXTRA2 | `10:11`  | extends Rdest (R\*\_EXTRA2 Encoding)   |
+| Rsrc_EXTRA2  | `12:13`  | extends Rsrc  (R\*\_EXTRA2 Encoding)   |
+| src_SUBVL    | `14:15`  | SUBVL for Source              |
+| MASK_SRC     | `16:18`  | Execution Mask for Source     |
+
+The inclusion of a separate src SUBVL would allow either
+`sv.mv RT.vecN RA.vecN` to mean contiguous sequential copy
+or it could mean zip/unzip (pack/unpack).