From: Uros Bizjak Date: Fri, 26 Jan 2018 15:36:32 +0000 (+0100) Subject: re PR target/81763 (Issues with BMI on 32bit x86 apps on GCC 7.1+) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=66d617d083aa4fe61a5206d1fc5356b47f33d114;p=gcc.git re PR target/81763 (Issues with BMI on 32bit x86 apps on GCC 7.1+) PR target/81763 * config/i386/i386.md (*andndi3_doubleword): Add earlyclobber to (=&r,r,rm) alternative. Add (=r,0,rm) and (=r,r,0) alternatives. From-SVN: r257096 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2f6426927a5..c23cb360725 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2018-01-26 Uros Bizjak + + PR target/81763 + * config/i386/i386.md (*andndi3_doubleword): Add earlyclobber + to (=&r,r,rm) alternative. Add (=r,0,rm) and (=r,r,0) alternatives. + 2018-01-26 Richard Biener PR rtl-optimization/84003 diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 5cd3ec093cd..fe9649d8738 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -9250,14 +9250,14 @@ }) (define_insn "*andndi3_doubleword" - [(set (match_operand:DI 0 "register_operand" "=r,&r") + [(set (match_operand:DI 0 "register_operand" "=&r,r,r,&r") (and:DI - (not:DI (match_operand:DI 1 "register_operand" "r,0")) - (match_operand:DI 2 "nonimmediate_operand" "rm,rm"))) + (not:DI (match_operand:DI 1 "register_operand" "r,0,r,0")) + (match_operand:DI 2 "nonimmediate_operand" "rm,rm,0,rm"))) (clobber (reg:CC FLAGS_REG))] "!TARGET_64BIT && TARGET_STV && TARGET_SSE2" "#" - [(set_attr "isa" "bmi,*")]) + [(set_attr "isa" "bmi,bmi,bmi,*")]) (define_split [(set (match_operand:DI 0 "register_operand")