From: Andrey Miroshnikov <andrey@technepisteme.xyz>
Date: Wed, 26 Jan 2022 22:04:06 +0000 (+0000)
Subject: Forgot to update pinmux image link
X-Git-Tag: opf_rfc_ls005_v1~3241
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=66ebd0fa4e87df12091a6f50a937b4d03d74f3cf;p=libreriscv.git

Forgot to update pinmux image link
---

diff --git a/docs/pinmux.mdwn b/docs/pinmux.mdwn
index e15cc26b7..17429715e 100644
--- a/docs/pinmux.mdwn
+++ b/docs/pinmux.mdwn
@@ -504,6 +504,7 @@ also require access to the WB bus to access GPIO configuration options
 not available to bank 1/2/3 peripherals.
 
 ### Proposal
+TODO: REWORK BASED ON GPIO JTAG DIAGRAMS BELOW
 The proposed JTAG BS chain is as follows:
 
 * Between each peripheral and GPIO block, add a JTAG BS chain. For example
@@ -536,11 +537,11 @@ As you can see by the above list, the GPIO block is becoming quite a complex
 beast. If there are suggestions to simplify or reduce some of the signals,
 that will be helpful.*
 
-The diagrams below show 1-bit GPIO connectivity, as well as the N-bit case.
+The diagrams below show 1-bit GPIO connectivity, as well as the 4-bit case.
 
 [[!img gpio_jtag_1bit.jpg size="600x"]]
 
-[[!img gpio_jtag_nbit.jpg size="600x"]]
+[[!img gpio_jtag_4bit.jpg size="600x"]]
 
 # Core/Pad Connection + JTAG Mux
 
diff --git a/docs/pinmux/gpio_jtag_1bit.jpg b/docs/pinmux/gpio_jtag_1bit.jpg
index 9cdb74761..a6bd7f4f6 100644
Binary files a/docs/pinmux/gpio_jtag_1bit.jpg and b/docs/pinmux/gpio_jtag_1bit.jpg differ