From: Kenneth Graunke Date: Fri, 26 Sep 2014 17:26:09 +0000 (-0700) Subject: i965: Move CACHE_NEW_*_VP flags to BRW_NEW_*_VP. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=66ebfad3cd123b6e23e28bdf17cda203b7c99a30;p=mesa.git i965: Move CACHE_NEW_*_VP flags to BRW_NEW_*_VP. We've been streaming these out for ages, so they basically have nothing to do with brw_state_cache.c. Saves 6 * sizeof(void *) bytes per context, as we won't have useless aux_compare/aux_free functions for them. Signed-off-by: Kenneth Graunke Reviewed-by: Kristian Høgsberg Reviewed-by: Matt Turner --- diff --git a/src/mesa/drivers/dri/i965/brw_cc.c b/src/mesa/drivers/dri/i965/brw_cc.c index 86ab503e2e2..01974e1ab6d 100644 --- a/src/mesa/drivers/dri/i965/brw_cc.c +++ b/src/mesa/drivers/dri/i965/brw_cc.c @@ -68,7 +68,7 @@ brw_upload_cc_vp(struct brw_context *brw) OUT_BATCH(brw->cc.vp_offset); ADVANCE_BATCH(); } else { - brw->state.dirty.cache |= CACHE_NEW_CC_VP; + brw->state.dirty.brw |= BRW_NEW_CC_VP; } } @@ -227,7 +227,7 @@ static void upload_cc_unit(struct brw_context *brw) if (brw->stats_wm || unlikely(INTEL_DEBUG & DEBUG_STATS)) cc->cc5.statistics_enable = 1; - /* CACHE_NEW_CC_VP */ + /* BRW_NEW_CC_VP */ cc->cc4.cc_viewport_state_offset = (brw->batch.bo->offset64 + brw->cc.vp_offset) >> 5; /* reloc */ @@ -248,8 +248,9 @@ const struct brw_tracked_state brw_cc_unit = { _NEW_DEPTH | _NEW_STENCIL, .brw = BRW_NEW_BATCH | + BRW_NEW_CC_VP | BRW_NEW_STATS_WM, - .cache = CACHE_NEW_CC_VP + .cache = 0 }, .emit = upload_cc_unit, }; diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index f7418480c36..cd1daee6064 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -184,6 +184,9 @@ enum brw_state_id { BRW_STATE_NUM_SAMPLES, BRW_STATE_TEXTURE_BUFFER, BRW_STATE_GEN4_UNIT_STATE, + BRW_STATE_CC_VP, + BRW_STATE_SF_VP, + BRW_STATE_CLIP_VP, BRW_NUM_STATE_BITS }; @@ -226,6 +229,9 @@ enum brw_state_id { #define BRW_NEW_NUM_SAMPLES (1ull << BRW_STATE_NUM_SAMPLES) #define BRW_NEW_TEXTURE_BUFFER (1ull << BRW_STATE_TEXTURE_BUFFER) #define BRW_NEW_GEN4_UNIT_STATE (1ull << BRW_STATE_GEN4_UNIT_STATE) +#define BRW_NEW_CC_VP (1ull << BRW_STATE_CC_VP) +#define BRW_NEW_SF_VP (1ull << BRW_STATE_SF_VP) +#define BRW_NEW_CLIP_VP (1ull << BRW_STATE_CLIP_VP) struct brw_state_flags { /** State update flags signalled by mesa internals */ @@ -685,16 +691,13 @@ struct brw_gs_prog_data #define SHADER_TIME_STRIDE 64 enum brw_cache_id { - BRW_CC_VP, BRW_WM_PROG, BRW_BLORP_BLIT_PROG, BRW_SAMPLER, BRW_SF_PROG, - BRW_SF_VP, BRW_VS_PROG, BRW_FF_GS_PROG, BRW_GS_PROG, - BRW_CLIP_VP, BRW_CLIP_PROG, BRW_MAX_CACHE @@ -773,16 +776,13 @@ enum shader_time_shader_type { /* Flags for brw->state.cache. */ -#define CACHE_NEW_CC_VP (1<scissor.ymax = ctx->DrawBuffer->Height - ctx->DrawBuffer->_Ymin - 1; } - brw->state.dirty.cache |= CACHE_NEW_SF_VP; + brw->state.dirty.brw |= BRW_NEW_SF_VP; } const struct brw_tracked_state brw_sf_vp = { @@ -172,7 +172,7 @@ static void upload_sf_unit( struct brw_context *brw ) if (unlikely(INTEL_DEBUG & DEBUG_STATS)) sf->thread4.stats_enable = 1; - /* CACHE_NEW_SF_VP */ + /* BRW_NEW_SF_VP */ sf->sf5.sf_viewport_state_offset = (brw->batch.bo->offset64 + brw->sf.vp_offset) >> 5; /* reloc */ @@ -306,9 +306,9 @@ const struct brw_tracked_state brw_sf_unit = { _NEW_SCISSOR, .brw = BRW_NEW_BATCH | BRW_NEW_PROGRAM_CACHE | + BRW_NEW_SF_VP | BRW_NEW_URB_FENCE, - .cache = CACHE_NEW_SF_PROG | - CACHE_NEW_SF_VP, + .cache = CACHE_NEW_SF_PROG, }, .emit = upload_sf_unit, }; diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index 6cc2770294d..db0119cde22 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -520,20 +520,20 @@ static struct dirty_bit_map brw_bits[] = { DEFINE_BIT(BRW_NEW_NUM_SAMPLES), DEFINE_BIT(BRW_NEW_TEXTURE_BUFFER), DEFINE_BIT(BRW_NEW_GEN4_UNIT_STATE), + DEFINE_BIT(BRW_NEW_CC_VP), + DEFINE_BIT(BRW_NEW_SF_VP), + DEFINE_BIT(BRW_NEW_CLIP_VP), {0, 0, 0} }; static struct dirty_bit_map cache_bits[] = { - DEFINE_BIT(CACHE_NEW_CC_VP), DEFINE_BIT(CACHE_NEW_WM_PROG), DEFINE_BIT(CACHE_NEW_BLORP_BLIT_PROG), DEFINE_BIT(CACHE_NEW_SAMPLER), DEFINE_BIT(CACHE_NEW_SF_PROG), - DEFINE_BIT(CACHE_NEW_SF_VP), DEFINE_BIT(CACHE_NEW_VS_PROG), DEFINE_BIT(CACHE_NEW_FF_GS_PROG), DEFINE_BIT(CACHE_NEW_GS_PROG), - DEFINE_BIT(CACHE_NEW_CLIP_VP), DEFINE_BIT(CACHE_NEW_CLIP_PROG), {0, 0, 0} }; diff --git a/src/mesa/drivers/dri/i965/gen6_viewport_state.c b/src/mesa/drivers/dri/i965/gen6_viewport_state.c index 0d5284d704f..4c8fe4c322f 100644 --- a/src/mesa/drivers/dri/i965/gen6_viewport_state.c +++ b/src/mesa/drivers/dri/i965/gen6_viewport_state.c @@ -63,7 +63,7 @@ gen6_upload_clip_vp(struct brw_context *brw) vp->ymin = -gby; vp->ymax = gby; - brw->state.dirty.cache |= CACHE_NEW_CLIP_VP; + brw->state.dirty.brw |= BRW_NEW_CLIP_VP; } const struct brw_tracked_state gen6_clip_vp = { @@ -106,7 +106,7 @@ gen6_upload_sf_vp(struct brw_context *brw) sfv->viewport.m31 = v[MAT_TY] * y_scale + y_bias; sfv->viewport.m32 = v[MAT_TZ] * depth_scale; - brw->state.dirty.cache |= CACHE_NEW_SF_VP; + brw->state.dirty.brw |= BRW_NEW_SF_VP; } const struct brw_tracked_state gen6_sf_vp = { @@ -136,10 +136,11 @@ const struct brw_tracked_state gen6_viewport_state = { .dirty = { .mesa = 0, .brw = BRW_NEW_BATCH | + BRW_NEW_CC_VP | + BRW_NEW_CLIP_VP | + BRW_NEW_SF_VP | BRW_NEW_STATE_BASE_ADDRESS, - .cache = CACHE_NEW_CC_VP | - CACHE_NEW_CLIP_VP | - CACHE_NEW_SF_VP, + .cache = 0, }, .emit = upload_viewport_state_pointers, };