From: Anton Blanchard <anton@linux.ibm.com>
Date: Sat, 8 Jan 2022 21:08:48 +0000 (+1100)
Subject: Merge pull request #338 from shenki/yosys-read-verilog
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=67164a6ffa41672d8779f62efb0a5a7d96b7a1f7;p=microwatt.git

Merge pull request #338 from shenki/yosys-read-verilog

Makefile: Use read_verilog with yosys
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67164a6ffa41672d8779f62efb0a5a7d96b7a1f7