From: Joseph Myers Date: Sun, 14 Nov 2004 00:38:32 +0000 (+0000) Subject: i386.c (override_options): Move loop to set default tuning to correct place. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6716ecbcfd3ddc82cd4460a9894dd14b9d6bb943;p=gcc.git i386.c (override_options): Move loop to set default tuning to correct place. * config/i386/i386.c (override_options): Move loop to set default tuning to correct place. From-SVN: r90606 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ba8cdf2bff0..a98165bef9f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2004-11-14 Joseph Myers + + * config/i386/i386.c (override_options): Move loop to set default + tuning to correct place. + 2004-11-13 Zak Kipling PR target/18300 diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 089957e830b..997863731f9 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -1305,6 +1305,19 @@ override_options (void) target_flags |= MASK_SSE3; if (processor_alias_table[i].flags & PTA_PREFETCH_SSE) x86_prefetch_sse = true; + if (TARGET_64BIT && !(processor_alias_table[i].flags & PTA_64BIT)) + error ("CPU you selected does not support x86-64 " + "instruction set"); + break; + } + + if (i == pta_size) + error ("bad value (%s) for -march= switch", ix86_arch_string); + + for (i = 0; i < pta_size; i++) + if (! strcmp (ix86_tune_string, processor_alias_table[i].name)) + { + ix86_tune = processor_alias_table[i].processor; if (TARGET_64BIT && !(processor_alias_table[i].flags & PTA_64BIT)) { if (ix86_tune_defaulted) @@ -1320,19 +1333,6 @@ override_options (void) error ("CPU you selected does not support x86-64 " "instruction set"); } - break; - } - - if (i == pta_size) - error ("bad value (%s) for -march= switch", ix86_arch_string); - - for (i = 0; i < pta_size; i++) - if (! strcmp (ix86_tune_string, processor_alias_table[i].name)) - { - ix86_tune = processor_alias_table[i].processor; - if (TARGET_64BIT && !(processor_alias_table[i].flags & PTA_64BIT)) - error ("CPU you selected does not support x86-64 instruction set"); - /* Intel CPUs have always interpreted SSE prefetch instructions as NOPs; so, we can enable SSE prefetch instructions even when -mtune (rather than -march) points us to a processor that has them.