From: Andrew Cagney <cagney@redhat.com>
Date: Fri, 23 Jun 2000 12:39:41 +0000 (+0000)
Subject: Fix printf arguments.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=673388c077f8f1fdb185e0dc563b1dbd563b59f2;p=binutils-gdb.git

Fix printf arguments.
---

diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index a6e059ca106..ef2e85a0cde 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,7 @@
+Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
+
+	* mips.igen (MxC1, DMxC1): Fix printf formatting.
+
 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
 
 	* mips.igen (do_dmultx): Fix typo.
diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen
index 585e83a61b9..23908a967e5 100644
--- a/sim/mips/mips.igen
+++ b/sim/mips/mips.igen
@@ -3034,8 +3034,8 @@
 	{
 	  if (STATE_VERBOSE_P(SD))
 	    sim_io_eprintf (SD, 
-	      "Warning: PC 0x%x: semantic_DMxC1_COP1Sa 32-bit use of odd FPR number\n",
-	      CIA);
+	      "Warning: PC 0x%lx: semantic_DMxC1_COP1Sa 32-bit use of odd FPR number\n",
+	      (long) CIA);
 	  PENDING_FILL(RT,SET64HI(0xDEADC0DE) | 0xBAD0BAD0);
 	}
     }
@@ -3209,7 +3209,8 @@
 	{
 	  if (STATE_VERBOSE_P(SD))
 	    sim_io_eprintf (SD, 
-	      "Warning:  PC 0x%x: MTC1 not DMTC1 with 64 bit regs\n", CIA);
+			    "Warning:  PC 0x%lx: MTC1 not DMTC1 with 64 bit regs\n",
+			    (long) CIA);
 	  PENDING_FILL ((FS + FGRIDX), (SET64HI(0xDEADC0DE) | VL4_8(GPR[RT])));
 	}
       else