From: Carl Love <cel@us.ibm.com>
Date: Mon, 29 Jan 2018 16:59:06 +0000 (+0000)
Subject: extend.tex: Fix typo in second arg in __builtin_bcdadd_{lt|eq|gt|ov}...
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=676d626b0c7d19c7a27c10634ecd916352ec581c;p=gcc.git

extend.tex: Fix typo in second arg in __builtin_bcdadd_{lt|eq|gt|ov}...

gcc/ChangeLog:

2018-01-22 Carl Love <cel@us.ibm.com>

	* doc/extend.tex: Fix typo in second arg in
	__builtin_bcdadd_{lt|eq|gt|ov}, and __builtin_bcdsub_{lt|eq|gt|ov}.

From-SVN: r257156
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e860055a445..a838edc448a 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2018-01-22 Carl Love <cel@us.ibm.com>
+
+	* doc/extend.tex: Fix typo in second arg in
+	__builtin_bcdadd_{lt|eq|gt|ov} and __builtin_bcdsub_{lt|eq|gt|ov}.
+
 2018-01-29  Richard Biener  <rguenther@suse.de>
 
 	PR tree-optimization/84086
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index a4b21e6c67a..5f4e8bbc185 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -18970,16 +18970,16 @@ vector __uint128_t vec_vsubcuq (vector __uint128_t, vector __uint128_t);
 __int128_t vec_vsubuqm (__int128_t, __int128_t);
 __uint128_t vec_vsubuqm (__uint128_t, __uint128_t);
 
-vector __int128_t __builtin_bcdadd (vector __int128_t, vector__int128_t);
-int __builtin_bcdadd_lt (vector __int128_t, vector__int128_t);
-int __builtin_bcdadd_eq (vector __int128_t, vector__int128_t);
-int __builtin_bcdadd_gt (vector __int128_t, vector__int128_t);
-int __builtin_bcdadd_ov (vector __int128_t, vector__int128_t);
-vector __int128_t bcdsub (vector __int128_t, vector__int128_t);
-int __builtin_bcdsub_lt (vector __int128_t, vector__int128_t);
-int __builtin_bcdsub_eq (vector __int128_t, vector__int128_t);
-int __builtin_bcdsub_gt (vector __int128_t, vector__int128_t);
-int __builtin_bcdsub_ov (vector __int128_t, vector__int128_t);
+vector __int128_t __builtin_bcdadd (vector __int128_t, vector __int128_t);
+int __builtin_bcdadd_lt (vector __int128_t, vector __int128_t);
+int __builtin_bcdadd_eq (vector __int128_t, vector __int128_t);
+int __builtin_bcdadd_gt (vector __int128_t, vector __int128_t);
+int __builtin_bcdadd_ov (vector __int128_t, vector __int128_t);
+vector __int128_t bcdsub (vector __int128_t, vector __int128_t);
+int __builtin_bcdsub_lt (vector __int128_t, vector __int128_t);
+int __builtin_bcdsub_eq (vector __int128_t, vector __int128_t);
+int __builtin_bcdsub_gt (vector __int128_t, vector __int128_t);
+int __builtin_bcdsub_ov (vector __int128_t, vector __int128_t);
 @end smallexample
 
 If the ISA 3.0 instruction set additions (@option{-mcpu=power9})