From: Eddie Hung <eddie@fpgeh.com>
Date: Mon, 8 Apr 2019 23:24:20 +0000 (-0700)
Subject: $_XILINX_SHREG_ to preserve src attribute
X-Git-Tag: yosys-0.9~171^2~11
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6797f6b6c4660622dbde27ced83fdd37a874f00d;p=yosys.git

$_XILINX_SHREG_ to preserve src attribute
---

diff --git a/passes/techmap/shregmap.cc b/passes/techmap/shregmap.cc
index bd75cd95e..ec43b5654 100644
--- a/passes/techmap/shregmap.cc
+++ b/passes/techmap/shregmap.cc
@@ -232,6 +232,7 @@ struct ShregmapTechXilinx7 : ShregmapTech
 		log_assert(it != sigbit_to_shiftx_offset.end());
 
 		auto newcell = cell->module->addCell(NEW_ID, "$__XILINX_SHREG_");
+		newcell->set_src_attribute(cell->get_src_attribute());
 		newcell->setParam("\\DEPTH", cell->getParam("\\DEPTH"));
 		newcell->setParam("\\INIT", cell->getParam("\\INIT"));
 		newcell->setParam("\\CLKPOL", cell->getParam("\\CLKPOL"));