From: Nick Clifton <nickc@redhat.com>
Date: Wed, 29 Mar 2000 18:23:57 +0000 (+0000)
Subject: Disassemble 0xde.. to "bal" [branch always] instead of "undefined".
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=67b60d924f866a521ebd815162d02694a60bd87c;p=binutils-gdb.git

Disassemble 0xde.. to "bal" [branch always] instead of "undefined".
---

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index eb2b278faff..4e2200afaa7 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2000-03-29  Thomas de Lellis  <tdel@windriver.com>
+
+	* arm-opc.h (thumb_opcodes): Disassemble 0xde.. to "bal"
+	[branch always] instead of "undefined".
+
 2000-03-27  Nick Clifton  <nickc@cygnus.com>
 
 	* d30v-opc.c (d30v_format_table): Move SHORT_AR to end of list of
diff --git a/opcodes/arm-opc.h b/opcodes/arm-opc.h
index 2ea3e13a44b..44a16a425f0 100644
--- a/opcodes/arm-opc.h
+++ b/opcodes/arm-opc.h
@@ -73,7 +73,8 @@ Thumb specific format options:
 /* Note: There is a partial ordering in this table - it must be searched from
    the top to obtain a correct match. */
 
-static struct arm_opcode arm_opcodes[] = {
+static struct arm_opcode arm_opcodes[] =
+{
     /* ARM instructions */
     {0xe1a00000, 0xffffffff, "nop\t\t\t(mov r0,r0)"},
     {0x012FFF10, 0x0ffffff0, "bx%c\t%0-3r"},
@@ -163,7 +164,8 @@ static struct arm_opcode arm_opcodes[] = {
     {0x0e000010, 0x0f100010, "mcr%c\t%8-11d, %21-23d, %12-15r, cr%16-19d, cr%0-3d, {%5-7d}"},
     {0x0c000000, 0x0e100000, "stc%c%22'l\t%8-11d, cr%12-15d, %A"},
     {0x0c100000, 0x0e100000, "ldc%c%22'l\t%8-11d, cr%12-15d, %A"},
-    /* the rest */
+    
+    /* The rest.  */
     {0x00000000, 0x00000000, "undefined instruction %0-31x"},
     {0x00000000, 0x00000000, 0}
 };
@@ -265,7 +267,7 @@ static struct thumb_opcode thumb_opcodes[] =
   {0xDC00, 0xFF00, "bgt\t%0-7B"},
   {0xDD00, 0xFF00, "ble\t%0-7B"},
   /* format 17 */
-  {0xDE00, 0xFF00, "undefined"},
+  {0xDE00, 0xFF00, "bal\t%0-7B"},
   {0xDF00, 0xFF00, "swi\t%0-7d"},
   /* format 9 */
   {0x6000, 0xF800, "str\t%0-2r, [%3-5r, #%6-10W]"},