From: whitequark <whitequark@whitequark.org>
Date: Fri, 17 Apr 2020 18:57:00 +0000 (+0000)
Subject: Merge pull request #1952 from boqwxp/add_edge_location
X-Git-Tag: working-ls180~619
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=67fbc00a1824aafb2af2e7c4b7a9590c7bc718fa;p=yosys.git

Merge pull request #1952 from boqwxp/add_edge_location

Verilog frontend: add source location in more parser rules
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67fbc00a1824aafb2af2e7c4b7a9590c7bc718fa