From: Gabe Black <gblack@eecs.umich.edu>
Date: Sun, 2 Dec 2007 07:06:52 +0000 (-0800)
Subject: X86: Fix a copy paste error in the bts microcode.
X-Git-Tag: m5_2.0_beta5~60
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=67fee0102648eb597c8c2a368da5f37f4b13b78b;p=gem5.git

X86: Fix a copy paste error in the bts microcode.

--HG--
extra : convert_revision : c4ac007d35ac13211f9816f1104c84f2b447ddba
---

diff --git a/src/arch/x86/isa/insts/general_purpose/compare_and_test/bit_test.py b/src/arch/x86/isa/insts/general_purpose/compare_and_test/bit_test.py
index 883ec4411..babd4a385 100644
--- a/src/arch/x86/isa/insts/general_purpose/compare_and_test/bit_test.py
+++ b/src/arch/x86/isa/insts/general_purpose/compare_and_test/bit_test.py
@@ -128,7 +128,7 @@ def macroop BTC_P_I {
     ldst t1, seg, [1, t2, t7]
     sexti t0, t1, imm, flags=(CF,)
     xor t1, t1, t3
-    st t1, seg, [scale, index, t2], disp
+    st t1, seg, [1, t2, t7], disp
 };
 
 def macroop BTC_R_R {
@@ -159,7 +159,7 @@ def macroop BTC_P_R {
     ldst t1, seg, [1, t2, t7]
     sext t0, t1, reg, flags=(CF,)
     xor t1, t1, t3
-    st t1, seg, [scale, index, t2], disp
+    st t1, seg, [1, t2, t7], disp
 };
 
 def macroop BTR_R_I {
@@ -193,7 +193,7 @@ def macroop BTR_P_I {
     ldst t1, seg, [1, t2, t7]
     sexti t0, t1, imm, flags=(CF,)
     and t1, t1, t3
-    st t1, seg, [scale, index, t2], disp
+    st t1, seg, [1, t2, t7], disp
 };
 
 def macroop BTR_R_R {
@@ -224,7 +224,7 @@ def macroop BTR_P_R {
     ldst t1, seg, [1, t2, t7]
     sext t0, t1, reg, flags=(CF,)
     and t1, t1, t3
-    st t1, seg, [scale, index, t2], disp
+    st t1, seg, [1, t2, t7], disp
 };
 
 def macroop BTS_R_I {
@@ -258,7 +258,7 @@ def macroop BTS_P_I {
     ldst t1, seg, [1, t2, t7]
     sexti t0, t1, imm, flags=(CF,)
     or t1, t1, t3
-    st t1, seg, [scale, index, t2], disp
+    st t1, seg, [1, t2, t7], disp
 };
 
 def macroop BTS_R_R {
@@ -289,6 +289,6 @@ def macroop BTS_P_R {
     ldst t1, seg, [1, t2, t7]
     sext t0, t1, reg, flags=(CF,)
     or t1, t1, t3
-    st t1, seg, [scale, index, t2], disp
+    st t1, seg, [1, t2, t7], disp
 };
 '''