From: Jacob Lifshay Date: Thu, 13 Oct 2022 02:10:14 +0000 (-0700) Subject: fix running code X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=680dae73373f0927a0cb9898b204f76d2019dc04;p=bigint-presentation-code.git fix running code --- diff --git a/src/bigint_presentation_code/toom_cook.py b/src/bigint_presentation_code/toom_cook.py index 50eb804..0c4e5b4 100644 --- a/src/bigint_presentation_code/toom_cook.py +++ b/src/bigint_presentation_code/toom_cook.py @@ -7,10 +7,10 @@ the register allocator uses an algorithm based on: from abc import ABCMeta, abstractmethod from collections import defaultdict -from enum import Enum, unique +from enum import Enum, unique, EnumMeta from functools import lru_cache from typing import (Sequence, AbstractSet, Iterable, Mapping, - TYPE_CHECKING, Sequence, TypeVar, Generic) + TYPE_CHECKING, Sequence, Sized, TypeVar, Generic) from nmutil.plain_data import plain_data @@ -21,12 +21,14 @@ else: return v -@plain_data(frozen=True, unsafe_hash=True) +class ABCEnumMeta(EnumMeta, ABCMeta): + pass + + class PhysLoc(metaclass=ABCMeta): __slots__ = () -@plain_data(frozen=True, unsafe_hash=True) class RegLoc(PhysLoc): __slots__ = () @@ -36,15 +38,9 @@ class RegLoc(PhysLoc): ... -@plain_data(frozen=True, unsafe_hash=True) -class GPRRangeOrStackLoc(PhysLoc): +class GPRRangeOrStackLoc(PhysLoc, Sized): __slots__ = () - @abstractmethod - def __len__(self): - # type: () -> int - ... - GPR_COUNT = 128 @@ -119,7 +115,7 @@ SPECIAL_GPRS = GPRRange(0), GPRRange(1), GPRRange(2), GPRRange(13) @final @unique -class XERBit(Enum, RegLoc): +class XERBit(RegLoc, Enum, metaclass=ABCEnumMeta): CY = "CY" def conflicts(self, other): @@ -131,7 +127,7 @@ class XERBit(Enum, RegLoc): @final @unique -class GlobalMem(Enum, RegLoc): +class GlobalMem(RegLoc, Enum, metaclass=ABCEnumMeta): """singleton representing all non-StackSlot memory -- treated as a single physical register for register allocation purposes. """