From: Patrick Urban Date: Fri, 24 Sep 2021 19:52:09 +0000 (+0200) Subject: synth_gatemate: Registers are uninitialized X-Git-Tag: yosys-0.12~26 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6825de6343e2b104ccad3d9ae6bf657deb80014e;p=yosys.git synth_gatemate: Registers are uninitialized --- diff --git a/techlibs/gatemate/cells_sim.v b/techlibs/gatemate/cells_sim.v index 0c9287b81..c1cacc6d1 100644 --- a/techlibs/gatemate/cells_sim.v +++ b/techlibs/gatemate/cells_sim.v @@ -294,7 +294,7 @@ module CC_DFF #( assign en = (EN_INV) ? ~EN : EN; assign sr = (SR_INV) ? ~SR : SR; - initial Q = 1'b0; + initial Q = 1'bX; always @(posedge clk or posedge sr) begin @@ -323,7 +323,7 @@ module CC_DLT #( assign en = (G_INV) ? ~G : G; assign sr = (SR_INV) ? ~SR : SR; - initial Q = 1'b0; + initial Q = 1'bX; always @(*) begin diff --git a/techlibs/gatemate/synth_gatemate.cc b/techlibs/gatemate/synth_gatemate.cc index 27a2b5bfa..b570e1e2a 100644 --- a/techlibs/gatemate/synth_gatemate.cc +++ b/techlibs/gatemate/synth_gatemate.cc @@ -305,7 +305,7 @@ struct SynthGateMatePass : public ScriptPass if (check_label("map_regs")) { run("opt_clean"); - run("dfflegalize -cell $_DFFE_????_ 0 -cell $_DLATCH_???_ 0"); + run("dfflegalize -cell $_DFFE_????_ x -cell $_DLATCH_???_ x"); run("techmap -map +/gatemate/reg_map.v"); run("opt_expr -mux_undef"); run("simplemap");