From: Giacomo Gabrielli Date: Thu, 7 Nov 2019 09:37:25 +0000 (+0000) Subject: cpu: Fix issue with MinorCPU predicated-false mem. accesses X-Git-Tag: v19.0.0.0~151 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=68288f344bebff2e4fbfe63dcc84e166a423dd6c;p=gem5.git cpu: Fix issue with MinorCPU predicated-false mem. accesses The code block was relying on passed_predicate only (conditional execution). This was not covering the case where the instruction gets executed, but the predicate register is false. Using the inLSQ variable is covering both cases and it makes more sense in terms of readibility. Change-Id: Ie1954f37968379a5bda9d0dc9f824a68304cc229 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23280 Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power Tested-by: kokoro --- diff --git a/src/cpu/minor/execute.cc b/src/cpu/minor/execute.cc index c9970b39a..832609993 100644 --- a/src/cpu/minor/execute.cc +++ b/src/cpu/minor/execute.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2014,2018 ARM Limited + * Copyright (c) 2013-2014,2018-2019 ARM Limited * All rights reserved * * The license below extends only to copyright in the software and shall @@ -498,12 +498,15 @@ Execute::executeMemRefInst(MinorDynInstPtr inst, BranchData &branch, if (inst->traceData) inst->traceData->setPredicate(passed_predicate); - /* If the instruction didn't pass its predicate (and so will not - * progress from here) Try to branch to correct and branch - * mis-prediction. */ - if (!passed_predicate) { + /* If the instruction didn't pass its predicate + * or it is a predicated vector instruction and the + * associated predicate register is all-false (and so will not + * progress from here) Try to branch to correct and branch + * mis-prediction. */ + if (!inst->inLSQ) { /* Leave it up to commit to handle the fault */ lsq.pushFailedRequest(inst); + inst->inLSQ = true; } }