From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sun, 3 Apr 2022 16:00:18 +0000 (+0100)
Subject: correct default to zero string not zero int
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6828f2a2930ffd8f3ba4a6aee75315972d856a56;p=soc.git

correct default to zero string not zero int
---

diff --git a/src/soc/simple/issuer_verilog.py b/src/soc/simple/issuer_verilog.py
index 1ddc4211..dd7bcc77 100644
--- a/src/soc/simple/issuer_verilog.py
+++ b/src/soc/simple/issuer_verilog.py
@@ -59,7 +59,7 @@ if __name__ == '__main__':
     parser.add_argument("--disable-svp64", dest='svp64', action="store_false",
                         help="disable SVP64",
                         default=False)
-    parser.add_argument("--pc-reset", default=0,
+    parser.add_argument("--pc-reset", default="0",
                         help="Set PC at reset (default 0)")
     parser.add_argument("--xlen", default=64, type=int,
                         help="Set register width [default 64]")