From: Gabe Black Date: Wed, 3 Oct 2007 05:06:59 +0000 (-0700) Subject: X86: Fix up the microcode for the FST and FSTP instructions. X-Git-Tag: m5_2.0_beta4~82 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=683d6d46f6da1e0e0f377a5be1a14f7b6b4233a4;p=gem5.git X86: Fix up the microcode for the FST and FSTP instructions. --HG-- extra : convert_revision : ad68633e9b7eab425593acb20cf242bf98c2b642 --- diff --git a/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/load_or_store_floating_point.py b/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/load_or_store_floating_point.py index 37574da34..6d56ac3bd 100644 --- a/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/load_or_store_floating_point.py +++ b/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/load_or_store_floating_point.py @@ -66,23 +66,21 @@ def macroop FLD_P { }; def macroop FST_M { - movfp st(0), ufp1 - stfp ufp1, seg, sib, disp + stfp st(0), seg, sib, disp }; def macroop FST_P { - movfp st(0), ufp1 rdip t7 - stfp ufp1, seg, riprel, disp + stfp st(0), seg, riprel, disp }; def macroop FSTP_M { - movfp st(0), ufp1, spm=1 + movfp ufp1, st(0), spm=1 stfp ufp1, seg, sib, disp }; def macroop FSTP_P { - movfp st(0), ufp1, spm=1 + movfp ufp1, st(0), spm=1 rdip t7 stfp ufp1, seg, riprel, disp };