From: Dmitry Selyutin <ghostmansd@gmail.com>
Date: Sun, 18 Sep 2022 15:12:24 +0000 (+0300)
Subject: pysvp64asm: make zz also set src_zero
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=68698d90fe1cefbafe133f25d053257dc33c5bc2;p=openpower-isa.git

pysvp64asm: make zz also set src_zero
---

diff --git a/src/openpower/sv/trans/svp64.py b/src/openpower/sv/trans/svp64.py
index dda0576c..40fdc0ef 100644
--- a/src/openpower/sv/trans/svp64.py
+++ b/src/openpower/sv/trans/svp64.py
@@ -1113,6 +1113,7 @@ class SVP64Asm:
             # predicate zeroing
             elif encmode == 'zz': # TODO, a lot more checking on legality
                 dst_zero = 1      # NOT on cr_ops, that's RM[6]
+                src_zero = 1
             elif encmode == 'sz':
                 src_zero = 1
             elif encmode == 'dz':