From: lkcl <lkcl@web>
Date: Thu, 29 Sep 2022 19:47:49 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~264
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=68aa300cbca700b18657fe88797469a69b5dafe6;p=libreriscv.git

---

diff --git a/openpower/sv/biginteger.mdwn b/openpower/sv/biginteger.mdwn
index cd32936ed..0ecda5073 100644
--- a/openpower/sv/biginteger.mdwn
+++ b/openpower/sv/biginteger.mdwn
@@ -38,6 +38,21 @@ fashion that is hidden from the user, behind a consistent, stable ISA API.
 The same macro-op fusion may theoretically be deployed even on Scalar
 operations.
 
+# dsld and dsrd
+
+**DRAFT**
+
+`dsld` and `dsrd` are is similar to v3.0 `sld`, and
+is Z23-Form in "overwrite" on RT.
+
+|0.....5|6..10|11..15|16..20|21.22|23..30|31|
+|-------|-----|------|------|-----|------|--|
+| EXT04 | RT  |  RA  |  RB  | sm  |  XO  |Rc|
+
+Both instructions take two 64-bit sources, concatenate
+them together then extract 64 bits from it, the offset
+location determined by a third source.
+
 # maddedu
 
 **DRAFT**