From: Adrian Herrera <adrian.herrera@arm.com>
Date: Thu, 22 Aug 2019 13:18:37 +0000 (+0100)
Subject: dev-arm: modify GICv3 ITS default addr
X-Git-Tag: v19.0.0.0~594
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=69097ceac805ad5b7fc65404e80574c22b95e36e;p=gem5.git

dev-arm: modify GICv3 ITS default addr

The current default base address for GICv3 ITS stated in RealView is
0x2c120000. The redistributors base address is 0x2c010000; each
instantiated core has an associated redistributor with memory region
size 0x40000 (with GICv4 extension, enabled by default). With 8 cores,
the redistributor range spans to 0x2c210000, creating a conflict with
the ITS address space.

This patch changes the ITS base address to 0x2e010000 which guarantees
no overlapping with the redistributor.

Change-Id: I7dc1af9e69ac037f85ae96f0985554f1fb8372a0
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20608
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
---

diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py
index e6839ca7d..4a353164a 100644
--- a/src/dev/arm/RealView.py
+++ b/src/dev/arm/RealView.py
@@ -1098,7 +1098,7 @@ class VExpress_GEM5_V1(VExpress_GEM5_V1_Base):
 class VExpress_GEM5_V2_Base(VExpress_GEM5_Base):
     gic = Gicv3(dist_addr=0x2c000000, redist_addr=0x2c010000,
                 maint_int=ArmPPI(num=25),
-                its=Gicv3Its(pio_addr=0x2c120000))
+                its=Gicv3Its(pio_addr=0x2e010000))
 
     # Limiting to 128 since it will otherwise overlap with PCI space
     gic.cpu_max = 128