From: Alan Modra <amodra@gmail.com>
Date: Fri, 3 Apr 2015 23:16:26 +0000 (+1030)
Subject: re PR target/65576 (ICE in gcc.c-torture/compile/pr33855.c)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=69223faeb3a01ea6f41db002e6a1e907dad8e4a7;p=gcc.git

re PR target/65576 (ICE in gcc.c-torture/compile/pr33855.c)

	PR target/65576
	PR target/65240
	* config/rs6000/predicates.md (zero_reg_mem_operand): Exclude
	0.0 constant unless TARGET_VSX.
	* config/rs6000/rs6000.md (extenddftf2_internal): Remove last
	alternative.

From-SVN: r221862
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 03e8e3e3a35..d29f29a82b3 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2015-04-04  Alan Modra  <amodra@gmail.com>
+
+	PR target/65576
+	PR target/65240
+	* config/rs6000/predicates.md (zero_reg_mem_operand): Exclude
+	0.0 constant unless TARGET_VSX.
+	* config/rs6000/rs6000.md (extenddftf2_internal): Remove last
+	alternative.
+
 2015-04-03  Jan Hubicka  <hubicka@ucw.cz>
 
 	PR ipa/65648
diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
index 6abb40b5cff..3c8dfe6032d 100644
--- a/gcc/config/rs6000/predicates.md
+++ b/gcc/config/rs6000/predicates.md
@@ -964,7 +964,8 @@
 
 ;; Return 1 if the operand is CONST_DOUBLE 0, register or memory operand.
 (define_predicate "zero_reg_mem_operand"
-  (ior (match_operand 0 "zero_fp_constant")
+  (ior (and (match_test "TARGET_VSX")
+	    (match_operand 0 "zero_fp_constant"))
        (match_operand 0 "reg_or_mem_operand")))
 
 ;; Return 1 if the operand is a CONST_INT and it is the element for 64-bit
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index da962877057..5025e6080a3 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -8369,9 +8369,9 @@
 })
 
 (define_insn_and_split "*extenddftf2_internal"
-  [(set (match_operand:TF 0 "nonimmediate_operand" "=m,Y,ws,d,&d,r")
-       (float_extend:TF (match_operand:DF 1 "input_operand" "d,r,md,md,md,rm")))
-   (use (match_operand:DF 2 "zero_reg_mem_operand" "d,r,j,m,d,n"))]
+  [(set (match_operand:TF 0 "nonimmediate_operand" "=m,Y,ws,d,&d")
+       (float_extend:TF (match_operand:DF 1 "input_operand" "d,r,md,md,md")))
+   (use (match_operand:DF 2 "zero_reg_mem_operand" "d,r,j,m,d"))]
   "!TARGET_IEEEQUAD
    && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT 
    && TARGET_LONG_DOUBLE_128"