From: Jason Ekstrand <jason.ekstrand@intel.com>
Date: Thu, 18 Feb 2016 21:54:15 +0000 (-0800)
Subject: anv/pipeline: Fix a typo in the pipeline layout code
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=698ea542830ba0d56e514492fbdf73e3898d4c17;p=mesa.git

anv/pipeline: Fix a typo in the pipeline layout code
---

diff --git a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
index 4be630bcbe8..e745bf661ee 100644
--- a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
+++ b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
@@ -194,7 +194,7 @@ lower_tex(nir_tex_instr *tex, struct apply_pipeline_layout_state *state)
    if (tex->sampler) {
       unsigned set = tex->sampler->var->data.descriptor_set;
       unsigned binding = tex->sampler->var->data.binding;
-      tex->sampler_index = state->set[set].surface_offsets[binding];
+      tex->sampler_index = state->set[set].sampler_offsets[binding];
       lower_tex_deref(tex, tex->sampler, &tex->sampler_index,
                       nir_tex_src_sampler_offset, state);
    }