From: Andreas Sandberg <andreas.sandberg@arm.com>
Date: Fri, 28 Apr 2017 11:08:32 +0000 (+0000)
Subject: kvm, arm: Fix incorrect PSTATE sync
X-Git-Tag: v19.0.0.0~2815
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=699773a867d1095790cce38744d9b2c38a1f551e;p=gem5.git

kvm, arm: Fix incorrect PSTATE sync

The state transfer code wasn't reading back PSTATE correctly from the
CPU prior to updating the thread context and was incorreclty writing
the register as a 32-bit value when updating KVM. Correctly read back
the state before updating gem5's view of PSTATE and cast the value to
a uint64_t.

Change-Id: I0a6ff5b77b897c756b20a20f65c420f42386360f
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2963
Reviewed-by: Rahul Thakur <rjthakur@google.com>
---

diff --git a/src/arch/arm/kvm/armv8_cpu.cc b/src/arch/arm/kvm/armv8_cpu.cc
index 48bcc5fe9..352fb2c80 100644
--- a/src/arch/arm/kvm/armv8_cpu.cc
+++ b/src/arch/arm/kvm/armv8_cpu.cc
@@ -223,7 +223,7 @@ ArmV8KvmCPU::updateKvmState()
         cpsr.ge = 0;
     }
     DPRINTF(KvmContext, "  %s := 0x%x\n", "PSTATE", cpsr);
-    setOneReg(INT_REG(regs.pstate), cpsr);
+    setOneReg(INT_REG(regs.pstate), static_cast<uint64_t>(cpsr));
 
     for (const auto &ri : miscRegMap) {
         const uint64_t value(tc->readMiscReg(ri.idx));
@@ -269,7 +269,7 @@ ArmV8KvmCPU::updateThreadContext()
     DPRINTF(KvmContext, "In updateThreadContext():\n");
 
     // Update pstate thread context
-    const CPSR cpsr(tc->readMiscRegNoEffect(MISCREG_CPSR));
+    const CPSR cpsr(getOneRegU64(INT_REG(regs.pstate)));
     DPRINTF(KvmContext, "  %s := 0x%x\n", "PSTATE", cpsr);
     tc->setMiscRegNoEffect(MISCREG_CPSR, cpsr);
     tc->setCCReg(CCREG_NZ, cpsr.nz);