From: bugzilla-daemon <bugzilla-daemon@libre-riscv.org>
Date: Thu, 19 Mar 2020 03:00:55 +0000 (+0000)
Subject: [libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6a6300456360ee47255baaee03842511d279850d;p=libre-riscv-dev.git

[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
---

diff --git a/50/e71b9ae6b7c68ee34f7e7c8ead16d5c0f313fd b/50/e71b9ae6b7c68ee34f7e7c8ead16d5c0f313fd
new file mode 100644
index 0000000..f981587
--- /dev/null
+++ b/50/e71b9ae6b7c68ee34f7e7c8ead16d5c0f313fd
@@ -0,0 +1,66 @@
+Return-path: <libre-riscv-dev-bounces@lists.libre-riscv.org>
+Envelope-to: publicinbox@libre-riscv.org
+Delivery-date: Thu, 19 Mar 2020 03:00:58 +0000
+Received: from localhost ([::1] helo=libre-riscv.org)
+	by libre-riscv.org with esmtp (Exim 4.89)
+	(envelope-from <libre-riscv-dev-bounces@lists.libre-riscv.org>)
+	id 1jElQW-0002JT-U0; Thu, 19 Mar 2020 03:00:56 +0000
+Received: from localhost ([127.0.0.1] helo=bugs.libre-riscv.org)
+ by libre-riscv.org with esmtp (Exim 4.89)
+ (envelope-from <bugzilla-daemon@libre-riscv.org>) id 1jElQU-0002J7-VQ
+ for libre-riscv-dev@lists.libre-riscv.org; Thu, 19 Mar 2020 03:00:54 +0000
+From: bugzilla-daemon@libre-riscv.org
+To: libre-riscv-dev@lists.libre-riscv.org
+Date: Thu, 19 Mar 2020 03:00:55 +0000
+X-Bugzilla-Reason: CC
+X-Bugzilla-Type: changed
+X-Bugzilla-Watch-Reason: None
+X-Bugzilla-Product: Libre-SOC's first SoC
+X-Bugzilla-Component: Specification
+X-Bugzilla-Version: unspecified
+X-Bugzilla-Keywords: 
+X-Bugzilla-Severity: enhancement
+X-Bugzilla-Who: lkcl@lkcl.net
+X-Bugzilla-Status: CONFIRMED
+X-Bugzilla-Resolution: 
+X-Bugzilla-Priority: ---
+X-Bugzilla-Assigned-To: lkcl@lkcl.net
+X-Bugzilla-Flags: 
+X-Bugzilla-Changed-Fields: 
+Message-ID: <bug-186-13-BzRJ5aGRoE@http.bugs.libre-riscv.org/>
+In-Reply-To: <bug-186-13@http.bugs.libre-riscv.org/>
+References: <bug-186-13@http.bugs.libre-riscv.org/>
+X-Bugzilla-URL: http://bugs.libre-riscv.org/
+Auto-Submitted: auto-generated
+MIME-Version: 1.0
+Subject: [libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and
+ RISC-V
+X-BeenThere: libre-riscv-dev@lists.libre-riscv.org
+X-Mailman-Version: 2.1.23
+Precedence: list
+List-Id: Libre-RISCV General Development
+ <libre-riscv-dev.lists.libre-riscv.org>
+List-Unsubscribe: <http://lists.libre-riscv.org/mailman/options/libre-riscv-dev>, 
+ <mailto:libre-riscv-dev-request@lists.libre-riscv.org?subject=unsubscribe>
+List-Archive: <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/>
+List-Post: <mailto:libre-riscv-dev@lists.libre-riscv.org>
+List-Help: <mailto:libre-riscv-dev-request@lists.libre-riscv.org?subject=help>
+List-Subscribe: <http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev>, 
+ <mailto:libre-riscv-dev-request@lists.libre-riscv.org?subject=subscribe>
+Reply-To: Libre-RISCV General Development
+ <libre-riscv-dev@lists.libre-riscv.org>
+Content-Type: text/plain; charset="utf-8"
+Content-Transfer-Encoding: base64
+Errors-To: libre-riscv-dev-bounces@lists.libre-riscv.org
+Sender: "libre-riscv-dev" <libre-riscv-dev-bounces@lists.libre-riscv.org>
+
+aHR0cDovL2J1Z3MubGlicmUtcmlzY3Yub3JnL3Nob3dfYnVnLmNnaT9pZD0xODYKCi0tLSBDb21t
+ZW50ICM4OCBmcm9tIEx1a2UgS2VubmV0aCBDYXNzb24gTGVpZ2h0b24gPGxrY2xAbGtjbC5uZXQ+
+IC0tLQptaWNoYWVsLCBmaXJlZCB1cCBsYXB0b3AgYnJpZWxmbHkgd2hlbiBzdG9wcGVkIGdpdCBj
+b21taXRlZCBmaWVsZC1pbmRleCByZXZlcnNlCnBsZWFzZSBjaGVjayBpdCwgc2hvdWxkIHdvcmsu
+CgotLSAKWW91IGFyZSByZWNlaXZpbmcgdGhpcyBtYWlsIGJlY2F1c2U6CllvdSBhcmUgb24gdGhl
+IENDIGxpc3QgZm9yIHRoZSBidWcuCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f
+X19fX19fX19fX19fCmxpYnJlLXJpc2N2LWRldiBtYWlsaW5nIGxpc3QKbGlicmUtcmlzY3YtZGV2
+QGxpc3RzLmxpYnJlLXJpc2N2Lm9yZwpodHRwOi8vbGlzdHMubGlicmUtcmlzY3Yub3JnL21haWxt
+YW4vbGlzdGluZm8vbGlicmUtcmlzY3YtZGV2Cg==
+