From: Michael Meissner <meissner@linux.vnet.ibm.com>
Date: Fri, 7 Jul 2017 17:02:58 +0000 (+0000)
Subject: re PR target/81348 (PowerPC64: Code built with -mcpu=power9 hits SEGV in RTL split2)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6a69355ccf7c05c452ff1bea1fac1508d44bec5c;p=gcc.git

re PR target/81348 (PowerPC64: Code built with -mcpu=power9 hits SEGV in RTL split2)

[gcc]
2017-07-07  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/81348
	* config/rs6000/rs6000.md (HI sign_extend splitter): Use the
	correct operand in doing the split.

[gcc/testsuite]
2017-07-07  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/81348
	* gcc.target/powerpc/pr81348.c: New test.

From-SVN: r250054
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 1a78572a1dd..85cb86409b4 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2017-07-07  Michael Meissner  <meissner@linux.vnet.ibm.com>
+
+	PR target/81348
+	* config/rs6000/rs6000.md (HI sign_extend splitter): Use the
+	correct operand in doing the split.
+
 2017-07-07 Carl Love  <cel@us.ibm.com>
 
 	* config/rs6000/rs6000-c: Add support for built-in function
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index f78dbf913ec..2fd9ef0f168 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -940,7 +940,7 @@
    (set (match_dup 0)
 	(sign_extend:EXTHI (match_dup 2)))]
 {
-  operands[2] = gen_rtx_REG (HImode, REGNO (operands[1]));
+  operands[2] = gen_rtx_REG (HImode, REGNO (operands[0]));
 })
 
 (define_insn_and_split "*extendhi<mode>2_dot"
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index b6f6f80323f..cc0e5b89b23 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2017-07-07  Michael Meissner  <meissner@linux.vnet.ibm.com>
+
+	PR target/81348
+	* gcc.target/powerpc/pr81348.c: New test.
+
 2017-07-07  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 
 	* gfortran.dg/vect/pr60510.f: Require vect_double support.
diff --git a/gcc/testsuite/gcc.target/powerpc/pr81348.c b/gcc/testsuite/gcc.target/powerpc/pr81348.c
new file mode 100644
index 00000000000..e8e10bb598b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr81348.c
@@ -0,0 +1,24 @@
+/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-options "-mcpu=power9 -Og" } */
+
+/* PR target/81348: Compiler died in doing short->float conversion due to using
+   the wrong register in a define_split.  */
+
+int a;
+short b;
+float ***c;
+
+void d(void)
+{
+        int e = 3;
+
+        if (a)
+                e = b;
+
+        ***c = e;
+}
+
+/* { dg-final { scan-assembler {\mlxsihzx\M}  } } */
+/* { dg-final { scan-assembler {\mvextsh2d\M} } } */