From: Vincent Lejeune Date: Tue, 4 Sep 2012 14:49:25 +0000 (+0200) Subject: radeon/llvm: swap wrong OPCODE_IS_*_ZERO_* opcode and use X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6a85725f136862d8877dc76369c64e0c8b5ea4e6;p=mesa.git radeon/llvm: swap wrong OPCODE_IS_*_ZERO_* opcode and use Reviewed-by: Tom Stellard --- diff --git a/src/gallium/drivers/radeon/AMDGPUInstrInfo.h b/src/gallium/drivers/radeon/AMDGPUInstrInfo.h index 264311962ba..a3080767883 100644 --- a/src/gallium/drivers/radeon/AMDGPUInstrInfo.h +++ b/src/gallium/drivers/radeon/AMDGPUInstrInfo.h @@ -25,8 +25,8 @@ #define GET_INSTRINFO_ENUM #include "AMDGPUGenInstrInfo.inc" -#define OPCODE_IS_ZERO_INT 0x00000045 -#define OPCODE_IS_NOT_ZERO_INT 0x00000042 +#define OPCODE_IS_ZERO_INT 0x00000042 +#define OPCODE_IS_NOT_ZERO_INT 0x00000045 #define OPCODE_IS_ZERO 0x00000020 #define OPCODE_IS_NOT_ZERO 0x00000023 diff --git a/src/gallium/drivers/radeon/R600ISelLowering.cpp b/src/gallium/drivers/radeon/R600ISelLowering.cpp index fec9d4e257c..7c939354318 100644 --- a/src/gallium/drivers/radeon/R600ISelLowering.cpp +++ b/src/gallium/drivers/radeon/R600ISelLowering.cpp @@ -207,7 +207,7 @@ MachineBasicBlock * R600TargetLowering::EmitInstrWithCustomInserter( BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::PRED_X)) .addReg(AMDGPU::PREDICATE_BIT) .addOperand(MI->getOperand(1)) - .addImm(OPCODE_IS_ZERO) + .addImm(OPCODE_IS_NOT_ZERO) .addImm(0); // Flags TII->addFlag(NewMI, 1, MO_FLAG_PUSH); BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::JUMP)) @@ -221,7 +221,7 @@ MachineBasicBlock * R600TargetLowering::EmitInstrWithCustomInserter( BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::PRED_X)) .addReg(AMDGPU::PREDICATE_BIT) .addOperand(MI->getOperand(1)) - .addImm(OPCODE_IS_ZERO_INT) + .addImm(OPCODE_IS_NOT_ZERO_INT) .addImm(0); // Flags TII->addFlag(NewMI, 1, MO_FLAG_PUSH); BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::JUMP))