From: Shriya Sharma <shriya@redsemiconductor.com>
Date: Thu, 19 Oct 2023 10:30:22 +0000 (+0100)
Subject: added lwbrsx instruction
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6aa445dd62fc0d0213e7628d4ec90d69f7a1c719;p=openpower-isa.git

added lwbrsx instruction
---

diff --git a/openpower/isa/fixedloadshift.mdwn b/openpower/isa/fixedloadshift.mdwn
index d9dc38ac..3ed16670 100644
--- a/openpower/isa/fixedloadshift.mdwn
+++ b/openpower/isa/fixedloadshift.mdwn
@@ -237,16 +237,16 @@ Special Registers Altered:
 
     None
 
-# Load Word Byte-Reverse Indexed
+# Load Word Byte-Reverse Shifted Indexed
 
 X-Form
 
-* lwbrx RT,RA,RB
+* lwbrsx RT,RA,RB,sm
 
 Pseudo-code:
 
     b <- (RA|0)
-    EA <- b + (RB)
+    EA <- b + (RB) (sm+1)
     load_data <- MEM(EA, 4)
     RT <- ([0] * 32 || load_data[24:31] || load_data[16:23]
                     || load_data[8:15]  || load_data[0:7])