From: H.J. Lu Date: Sun, 14 Jan 2018 14:41:25 +0000 (+0000) Subject: x86: Add 'V' register operand modifier X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6abe11c1a3b9f86398134533560bdc57788a93c9;p=gcc.git x86: Add 'V' register operand modifier Add 'V', a special modifier which prints the name of the full integer register without '%'. For extern void (*func_p) (void); void foo (void) { asm ("call __x86_indirect_thunk_%V0" : : "a" (func_p)); } it generates: foo: movq func_p(%rip), %rax call __x86_indirect_thunk_rax ret gcc/ * config/i386/i386.c (print_reg): Print the name of the full integer register without '%'. (ix86_print_operand): Handle 'V'. * doc/extend.texi: Document 'V' modifier. gcc/testsuite/ * gcc.target/i386/indirect-thunk-register-4.c: New test. From-SVN: r256663 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2fb1c5a8adf..75de1b7fcdc 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2018-01-14 H.J. Lu + + * config/i386/i386.c (print_reg): Print the name of the full + integer register without '%'. + (ix86_print_operand): Handle 'V'. + * doc/extend.texi: Document 'V' modifier. + 2018-01-14 H.J. Lu * config/i386/constraints.md (Bs): Disallow memory operand for diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index c6ffdd9ede5..4ae89017bdf 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -17655,6 +17655,7 @@ put_condition_code (enum rtx_code code, machine_mode mode, bool reverse, If CODE is 'h', pretend the reg is the 'high' byte register. If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. If CODE is 'd', duplicate the operand for AVX instruction. + If CODE is 'V', print naked full integer register name without %. */ void @@ -17665,7 +17666,7 @@ print_reg (rtx x, int code, FILE *file) unsigned int regno; bool duplicated; - if (ASSEMBLER_DIALECT == ASM_ATT) + if (ASSEMBLER_DIALECT == ASM_ATT && code != 'V') putc ('%', file); if (x == pc_rtx) @@ -17717,6 +17718,14 @@ print_reg (rtx x, int code, FILE *file) return; } + if (code == 'V') + { + if (GENERAL_REGNO_P (regno)) + msize = GET_MODE_SIZE (word_mode); + else + error ("'V' modifier on non-integer register"); + } + duplicated = code == 'd' && TARGET_AVX; switch (msize) @@ -17836,6 +17845,7 @@ print_reg (rtx x, int code, FILE *file) & -- print some in-use local-dynamic symbol name. H -- print a memory address offset by 8; used for sse high-parts Y -- print condition for XOP pcom* instruction. + V -- print naked full integer register name without %. + -- print a branch hint as 'cs' or 'ds' prefix ; -- print a semicolon (after prefixes due to bug in older gas). ~ -- print "i" if TARGET_AVX2, "f" otherwise. @@ -18059,6 +18069,7 @@ ix86_print_operand (FILE *file, rtx x, int code) case 'X': case 'P': case 'p': + case 'V': break; case 's': diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index f120b2a1429..dce808f1eab 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -9292,6 +9292,9 @@ The table below shows the list of supported modifiers and their effects. @tab @code{2} @end multitable +@code{V} is a special modifier which prints the name of the full integer +register without @code{%}. + @anchor{x86floatingpointasmoperands} @subsubsection x86 Floating-Point @code{asm} Operands diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 796a3298110..9e3aeaff079 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2018-01-14 H.J. Lu + + * gcc.target/i386/indirect-thunk-register-4.c: New test. + 2018-01-14 H.J. Lu * gcc.target/i386/indirect-thunk-1.c (dg-options): Add diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-register-4.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-register-4.c new file mode 100644 index 00000000000..f0cd9b75be8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-register-4.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mindirect-branch=keep -fno-pic" } */ + +extern void (*func_p) (void); + +void +foo (void) +{ + asm("call __x86_indirect_thunk_%V0" : : "a" (func_p)); +} + +/* { dg-final { scan-assembler "call\[ \t\]*__x86_indirect_thunk_eax" { target ia32 } } } */ +/* { dg-final { scan-assembler "call\[ \t\]*__x86_indirect_thunk_rax" { target { ! ia32 } } } } */