From: Shriya Sharma <shriya@redsemiconductor.com>
Date: Fri, 27 Oct 2023 10:20:00 +0000 (+0100)
Subject: added english language description for lbzsx instruction
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6ad7204d9fb540bf2e239e51d60f6e3af686c8f0;p=openpower-isa.git

added english language description for lbzsx instruction
---

diff --git a/openpower/isa/fixedloadshift.mdwn b/openpower/isa/fixedloadshift.mdwn
index c2b22985..481547c9 100644
--- a/openpower/isa/fixedloadshift.mdwn
+++ b/openpower/isa/fixedloadshift.mdwn
@@ -38,6 +38,14 @@ Pseudo-code:
     EA <- b + (RB) << (SH+1)
     RT <- ([0] * (XLEN-8)) || MEM(EA, 1)
 
+Description:
+
+    Let the effective address (EA) be the sum of the contents of
+    register RB shifted by (SH+1), and (RA|0).
+    The byte in storage addressed by EA is loaded into
+    RT[56:63]. RT[0:55] are set to 0.
+
+
 Special Registers Altered:
 
     None