From: Kyrylo Tkachov Date: Mon, 1 Feb 2021 14:57:29 +0000 (+0000) Subject: aarch64: Reimplement vabdl_* intrinsics using builtins X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6b2034c479e5882a8566393e4fb632a23cfd6ff0;p=gcc.git aarch64: Reimplement vabdl_* intrinsics using builtins Another simple set of intrinsic moved to builtins in the straightforward way. gcc/ChangeLog: * config/aarch64/aarch64-simd-builtins.def (sabdl, uabdl): Define builtins. * config/aarch64/aarch64-simd.md (aarch64_abdl): New pattern. * config/aarch64/aarch64.md (unspec): Define UNSPEC_SABDL, UNSPEC_UABDL. * config/aarch64/arm_neon.h (vabdl_s8): Reimplemet using builtin. (vabdl_s16): Likewise. (vabdl_s32): Likewise. (vabdl_u8): Likewise. (vabdl_u16): Likewise. (vabdl_u32): Likewise. * config/aarch64/iterators.md (ABDL): New int iterator. (sur): Handle UNSPEC_SABDL, UNSPEC_UABDL. --- diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def index b82b6431d6f..441a4564865 100644 --- a/gcc/config/aarch64/aarch64-simd-builtins.def +++ b/gcc/config/aarch64/aarch64-simd-builtins.def @@ -172,6 +172,10 @@ BUILTIN_VQW (TERNOP, sabal2, 0, NONE) BUILTIN_VQW (TERNOPU, uabal2, 0, NONE) + /* Implemented by aarch64_abdl. */ + BUILTIN_VD_BHSI (BINOP, sabdl, 0, NONE) + BUILTIN_VD_BHSI (BINOPU, uabdl, 0, NONE) + /* Implemented by aarch64_abdl2. */ BUILTIN_VQW (BINOP, sabdl2, 0, NONE) BUILTIN_VQW (BINOPU, uabdl2, 0, NONE) diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index d1858663a4e..1d790f21424 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -818,6 +818,17 @@ [(set_attr "type" "neon_abd")] ) + +(define_insn "aarch64_abdl" + [(set (match_operand: 0 "register_operand" "=w") + (unspec: [(match_operand:VD_BHSI 1 "register_operand" "w") + (match_operand:VD_BHSI 2 "register_operand" "w")] + ABDL))] + "TARGET_SIMD" + "abdl\t%0., %1., %2." + [(set_attr "type" "neon_abd")] +) + (define_insn "aarch64_abdl2" [(set (match_operand: 0 "register_operand" "=w") (unspec: [(match_operand:VQW 1 "register_operand" "w") diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 16753c0d932..2c4066dd8f1 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -198,6 +198,7 @@ UNSPEC_RBIT UNSPEC_SABAL UNSPEC_SABAL2 + UNSPEC_SABDL UNSPEC_SABDL2 UNSPEC_SADALP UNSPEC_SCVTF @@ -220,6 +221,7 @@ UNSPEC_TLSLE48 UNSPEC_UABAL UNSPEC_UABAL2 + UNSPEC_UABDL UNSPEC_UABDL2 UNSPEC_UADALP UNSPEC_UCVTF diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h index ad0dfef80f3..0911ddbb387 100644 --- a/gcc/config/aarch64/arm_neon.h +++ b/gcc/config/aarch64/arm_neon.h @@ -6873,72 +6873,42 @@ __extension__ extern __inline int16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vabdl_s8 (int8x8_t __a, int8x8_t __b) { - int16x8_t __result; - __asm__ ("sabdl %0.8h, %1.8b, %2.8b" - : "=w"(__result) - : "w"(__a), "w"(__b) - : /* No clobbers */); - return __result; + return __builtin_aarch64_sabdlv8qi (__a, __b); } __extension__ extern __inline int32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vabdl_s16 (int16x4_t __a, int16x4_t __b) { - int32x4_t __result; - __asm__ ("sabdl %0.4s, %1.4h, %2.4h" - : "=w"(__result) - : "w"(__a), "w"(__b) - : /* No clobbers */); - return __result; + return __builtin_aarch64_sabdlv4hi (__a, __b); } __extension__ extern __inline int64x2_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vabdl_s32 (int32x2_t __a, int32x2_t __b) { - int64x2_t __result; - __asm__ ("sabdl %0.2d, %1.2s, %2.2s" - : "=w"(__result) - : "w"(__a), "w"(__b) - : /* No clobbers */); - return __result; + return __builtin_aarch64_sabdlv2si (__a, __b); } __extension__ extern __inline uint16x8_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vabdl_u8 (uint8x8_t __a, uint8x8_t __b) { - uint16x8_t __result; - __asm__ ("uabdl %0.8h, %1.8b, %2.8b" - : "=w"(__result) - : "w"(__a), "w"(__b) - : /* No clobbers */); - return __result; + return __builtin_aarch64_uabdlv8qi_uuu (__a, __b); } __extension__ extern __inline uint32x4_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vabdl_u16 (uint16x4_t __a, uint16x4_t __b) { - uint32x4_t __result; - __asm__ ("uabdl %0.4s, %1.4h, %2.4h" - : "=w"(__result) - : "w"(__a), "w"(__b) - : /* No clobbers */); - return __result; + return __builtin_aarch64_uabdlv4hi_uuu (__a, __b); } __extension__ extern __inline uint64x2_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) vabdl_u32 (uint32x2_t __a, uint32x2_t __b) { - uint64x2_t __result; - __asm__ ("uabdl %0.2d, %1.2s, %2.2s" - : "=w"(__result) - : "w"(__a), "w"(__b) - : /* No clobbers */); - return __result; + return __builtin_aarch64_uabdlv2si_uuu (__a, __b); } __extension__ extern __inline int8x16_t diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md index d57ec8479bc..51c7c154287 100644 --- a/gcc/config/aarch64/iterators.md +++ b/gcc/config/aarch64/iterators.md @@ -2189,6 +2189,9 @@ ;; The unspec codes for the SABAL, UABAL AdvancedSIMD instructions. (define_int_iterator ABAL [UNSPEC_SABAL UNSPEC_UABAL]) +;; The unspec codes for the SABDL, UABDL AdvancedSIMD instructions. +(define_int_iterator ABDL [UNSPEC_SABDL UNSPEC_UABDL]) + ;; The unspec codes for the SABAL2, UABAL2 AdvancedSIMD instructions. (define_int_iterator ABAL2 [UNSPEC_SABAL2 UNSPEC_UABAL2]) @@ -2979,6 +2982,7 @@ (UNSPEC_ADDHN "") (UNSPEC_RADDHN "r") (UNSPEC_SABAL "s") (UNSPEC_UABAL "u") (UNSPEC_SABAL2 "s") (UNSPEC_UABAL2 "u") + (UNSPEC_SABDL "s") (UNSPEC_UABDL "u") (UNSPEC_SABDL2 "s") (UNSPEC_UABDL2 "u") (UNSPEC_SADALP "s") (UNSPEC_UADALP "u") (UNSPEC_SUBHN "") (UNSPEC_RSUBHN "r")