From: Gabe Black Date: Thu, 13 Oct 2011 08:11:00 +0000 (-0700) Subject: SPARC: Narrow the scope of #if FULL_SYSTEM in SPARC's faults. X-Git-Tag: stable_2012_06_28~323 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6b5ede5e3918bb8f8039007d49f1ecc1f415e9f0;p=gem5.git SPARC: Narrow the scope of #if FULL_SYSTEM in SPARC's faults. --- diff --git a/src/arch/sparc/faults.cc b/src/arch/sparc/faults.cc index 01d57e627..fb0f6acb1 100644 --- a/src/arch/sparc/faults.cc +++ b/src/arch/sparc/faults.cc @@ -36,7 +36,7 @@ #include "arch/sparc/types.hh" #include "base/bitfield.hh" #include "base/trace.hh" -#include "config/full_system.hh" +#include "sim/full_system.hh" #include "cpu/base.hh" #include "cpu/thread_context.hh" #if !FULL_SYSTEM @@ -44,6 +44,7 @@ #include "mem/page_table.hh" #include "sim/process.hh" #endif +#include "sim/full_system.hh" using namespace std; @@ -494,12 +495,13 @@ getPrivVector(ThreadContext *tc, Addr &PC, Addr &NPC, MiscReg TT, MiscReg TL) NPC = PC + sizeof(MachInst); } -#if FULL_SYSTEM - void SparcFaultBase::invoke(ThreadContext * tc, StaticInstPtr inst) { FaultBase::invoke(tc); + if (!FullSystem) + return; + countStat()++; // We can refer to this to see what the trap level -was-, but something @@ -619,11 +621,10 @@ PowerOnReset::invoke(ThreadContext *tc, StaticInstPtr inst) */ } -#else // !FULL_SYSTEM - void FastInstructionAccessMMUMiss::invoke(ThreadContext *tc, StaticInstPtr inst) { +#if !FULL_SYSTEM Process *p = tc->getProcessPtr(); TlbEntry entry; bool success = p->pTable->lookup(vaddr, entry); @@ -634,11 +635,15 @@ FastInstructionAccessMMUMiss::invoke(ThreadContext *tc, StaticInstPtr inst) tc->getITBPtr()->insert(alignedVaddr, 0 /*partition id*/, p->M5_pid /*context id*/, false, entry.pte); } +#else + SparcFaultBase::invoke(tc, inst); +#endif } void FastDataAccessMMUMiss::invoke(ThreadContext *tc, StaticInstPtr inst) { +#if !FULL_SYSTEM Process *p = tc->getProcessPtr(); TlbEntry entry; bool success = p->pTable->lookup(vaddr, entry); @@ -653,11 +658,15 @@ FastDataAccessMMUMiss::invoke(ThreadContext *tc, StaticInstPtr inst) tc->getDTBPtr()->insert(alignedVaddr, 0 /*partition id*/, p->M5_pid /*context id*/, false, entry.pte); } +#else + SparcFaultBase::invoke(tc, inst); +#endif } void SpillNNormal::invoke(ThreadContext *tc, StaticInstPtr inst) { +#if !FULL_SYSTEM doNormalFault(tc, trapType(), false); Process *p = tc->getProcessPtr(); @@ -668,11 +677,15 @@ SpillNNormal::invoke(ThreadContext *tc, StaticInstPtr inst) // Then adjust the PC and NPC tc->pcState(lp->readSpillStart()); +#else + SparcFaultBase::invoke(tc, inst); +#endif } void FillNNormal::invoke(ThreadContext *tc, StaticInstPtr inst) { +#if !FULL_SYSTEM doNormalFault(tc, trapType(), false); Process *p = tc->getProcessPtr(); @@ -683,11 +696,15 @@ FillNNormal::invoke(ThreadContext *tc, StaticInstPtr inst) // Then adjust the PC and NPC tc->pcState(lp->readFillStart()); +#else + SparcFaultBase::invoke(tc, inst); +#endif } void TrapInstruction::invoke(ThreadContext *tc, StaticInstPtr inst) { +#if !FULL_SYSTEM // In SE, this mechanism is how the process requests a service from the // operating system. We'll get the process object from the thread context // and let it service the request. @@ -704,9 +721,10 @@ TrapInstruction::invoke(ThreadContext *tc, StaticInstPtr inst) PCState pc = tc->pcState(); pc.advance(); tc->pcState(pc); -} - +#else + SparcFaultBase::invoke(tc, inst); #endif +} } // namespace SparcISA diff --git a/src/arch/sparc/faults.hh b/src/arch/sparc/faults.hh index 88c269d66..e8fea3b15 100644 --- a/src/arch/sparc/faults.hh +++ b/src/arch/sparc/faults.hh @@ -66,10 +66,8 @@ class SparcFaultBase : public FaultBase const PrivilegeLevel nextPrivilegeLevel[NumLevels]; FaultStat count; }; -#if FULL_SYSTEM void invoke(ThreadContext * tc, StaticInstPtr inst = StaticInst::nullStaticInstPtr); -#endif virtual TrapType trapType() = 0; virtual FaultPriority priority() = 0; virtual FaultStat & countStat() = 0; @@ -96,10 +94,8 @@ class SparcFault : public SparcFaultBase class PowerOnReset : public SparcFault { -#if FULL_SYSTEM void invoke(ThreadContext * tc, StaticInstPtr inst = StaticInst::nullStaticInstPtr); -#endif }; class WatchDogReset : public SparcFault {}; @@ -204,28 +200,28 @@ class VAWatchpoint : public SparcFault {}; class FastInstructionAccessMMUMiss : public SparcFault { -#if !FULL_SYSTEM protected: Addr vaddr; public: FastInstructionAccessMMUMiss(Addr addr) : vaddr(addr) {} + FastInstructionAccessMMUMiss() : vaddr(0) + {} void invoke(ThreadContext * tc, StaticInstPtr inst = StaticInst::nullStaticInstPtr); -#endif }; class FastDataAccessMMUMiss : public SparcFault { -#if !FULL_SYSTEM protected: Addr vaddr; public: FastDataAccessMMUMiss(Addr addr) : vaddr(addr) {} + FastDataAccessMMUMiss() : vaddr(0) + {} void invoke(ThreadContext * tc, StaticInstPtr inst = StaticInst::nullStaticInstPtr); -#endif }; class FastDataAccessProtection : public SparcFault {}; @@ -243,10 +239,8 @@ class SpillNNormal : public EnumeratedFault public: SpillNNormal(uint32_t n) : EnumeratedFault(n) {;} // These need to be handled specially to enable spill traps in SE -#if !FULL_SYSTEM void invoke(ThreadContext * tc, StaticInstPtr inst = StaticInst::nullStaticInstPtr); -#endif }; class SpillNOther : public EnumeratedFault @@ -262,10 +256,8 @@ class FillNNormal : public EnumeratedFault FillNNormal(uint32_t n) : EnumeratedFault(n) {} // These need to be handled specially to enable fill traps in SE -#if !FULL_SYSTEM void invoke(ThreadContext * tc, StaticInstPtr inst = StaticInst::nullStaticInstPtr); -#endif }; class FillNOther : public EnumeratedFault @@ -281,10 +273,8 @@ class TrapInstruction : public EnumeratedFault TrapInstruction(uint32_t n) : EnumeratedFault(n) {} // In SE, trap instructions are requesting services from the OS. -#if !FULL_SYSTEM void invoke(ThreadContext * tc, StaticInstPtr inst = StaticInst::nullStaticInstPtr); -#endif }; } // namespace SparcISA