From: Luke Kenneth Casson Leighton Date: Mon, 17 Aug 2020 09:59:04 +0000 (+0100) Subject: use longer memtest in litex sim X-Git-Tag: semi_working_ecp5~304 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6b85f2e246e8e88c331438b05c3ac22d05d07e8e;p=soc.git use longer memtest in litex sim --- diff --git a/src/soc/litex/florent/sim.py b/src/soc/litex/florent/sim.py index 64236bc5..a3545ec7 100755 --- a/src/soc/litex/florent/sim.py +++ b/src/soc/litex/florent/sim.py @@ -78,9 +78,9 @@ class LibreSoCSim(SoCSDRAM): sdram_module.geom_settings, sdram_module.timing_settings) # FIXME: skip memtest to avoid corrupting memory - self.add_constant("MEMTEST_BUS_SIZE", 64//16) - self.add_constant("MEMTEST_DATA_SIZE", 64//16) - self.add_constant("MEMTEST_ADDR_SIZE", 64//16) + #self.add_constant("MEMTEST_BUS_SIZE", 64//16) + #self.add_constant("MEMTEST_DATA_SIZE", 64//16) + #self.add_constant("MEMTEST_ADDR_SIZE", 64//16) self.add_constant("MEMTEST_BUS_DEBUG", 1)