From: Vladimir Makarov Date: Wed, 31 Jan 2018 19:03:11 +0000 (+0000) Subject: re PR target/82444 (ICE in ira_init_register_move_cost, at ira.c:1581) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6b9a302f3112d6702f6b6d67f3f346ac4b80e0eb;p=gcc.git re PR target/82444 (ICE in ira_init_register_move_cost, at ira.c:1581) 2018-01-31 Vladimir Makarov PR target/82444 * ira.c (ira_init_register_move_cost): Remove assert. 2018-01-31 Vladimir Makarov PR target/82444 * gcc.target/i386/pr82444.c: New. From-SVN: r257254 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 40d570bbfc8..6c03ceea32b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2018-01-31 Vladimir Makarov + + PR target/82444 + * ira.c (ira_init_register_move_cost): Remove assert. + 2018-01-31 Eric Botcazou PR rtl-optimization/84071 diff --git a/gcc/ira.c b/gcc/ira.c index b70e2c60b74..0eafa0ab702 100644 --- a/gcc/ira.c +++ b/gcc/ira.c @@ -1578,7 +1578,8 @@ ira_init_register_move_cost (machine_mode mode) ira_assert (ira_register_move_cost[mode] == NULL && ira_may_move_in_cost[mode] == NULL && ira_may_move_out_cost[mode] == NULL); - ira_assert (have_regs_of_mode[mode]); + /* have_regs_of_mode[mode] might be false because it might be + E_ (see genmodes) of pseudo with . */ for (cl1 = 0; cl1 < N_REG_CLASSES; cl1++) for (cl2 = 0; cl2 < N_REG_CLASSES; cl2++) { diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 7994af53c5c..57fbb47f732 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2018-01-31 Vladimir Makarov + + PR target/82444 + * gcc.target/i386/pr82444.c: New. + 2018-01-31 Will Schmidt * gcc.target/powerpc/altivec-13.c: Remove VSX-requiring built-ins. diff --git a/gcc/testsuite/gcc.target/i386/pr82444.c b/gcc/testsuite/gcc.target/i386/pr82444.c new file mode 100644 index 00000000000..cded3fe5cc8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr82444.c @@ -0,0 +1,5 @@ +/* { dg-do compile { target { ia32 } } } */ +/* { dg-options "-march=athlon" } */ + +__float128 a; +void b () { __asm__("" : "+r"(a)); } /* { dg-error "inconsistent operand constraints in an" } */