From: Eddie Hung <eddie@fpgeh.com>
Date: Fri, 26 Apr 2019 22:32:58 +0000 (-0700)
Subject: Remove split_shiftx call
X-Git-Tag: working-ls180~1208^2~305
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6b9ca7cd6d14ac5e3ebf8354849a5c31d9a3a49b;p=yosys.git

Remove split_shiftx call
---

diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc
index b6b22284c..1320673e5 100644
--- a/techlibs/xilinx/synth_xilinx.cc
+++ b/techlibs/xilinx/synth_xilinx.cc
@@ -126,7 +126,6 @@ struct SynthXilinxPass : public Pass
 		log("\n");
 		log("    map_cells:\n");
 		log("        pmux2shiftx (without '-nosrl' and '-nomux' only)\n");
-		log("        split_shiftx (without '-nosrl' and '-nomux' only)\n");
 		log("        simplemap t:$dff t:$dffe (without '-nosrl' only)\n");
 		log("        opt_expr -mux_undef (without '-nosrl' only)\n");
 		log("        shregmap -tech xilinx -minlen 3 (without '-nosrl' only)\n");
@@ -310,10 +309,8 @@ struct SynthXilinxPass : public Pass
 			//   cells for identifying variable-length shift registers,
 			//   so attempt to convert $pmux-es to the former
 			// Also: wide multiplexer inference benefits from this too
-			if (!nosrl || !nomux) {
+			if (!nosrl || !nomux)
 				Pass::call(design, "pmux2shiftx");
-				Pass::call(design, "split_shiftx");
-			}
 
 			if (!nosrl) {
 				// shregmap operates on bit-level flops, not word-level,