From: Aaron Sawdey Date: Tue, 2 Oct 2018 17:31:53 +0000 (+0000) Subject: re PR target/87474 (ICE in extract_insn, at recog.c:2305) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6bd2b8ec8dddadce2fff21c2f22a71192a2e4e43;p=gcc.git re PR target/87474 (ICE in extract_insn, at recog.c:2305) 2018-10-02 Aaron Sawdey PR target/87474 * config/rs6000/rs6000-string.c (expand_strn_compare): Check that both P8_VECTOR and VSX are enabled. From-SVN: r264799 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9c7ba448de3..9906789b510 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2018-10-02 Aaron Sawdey + + PR target/87474 + * config/rs6000/rs6000-string.c (expand_strn_compare): Check that both + P8_VECTOR and VSX are enabled. + 2018-10-02 Andreas Krebbel * config/s390/driver-native.c (s390_host_detect_local_cpu): Add diff --git a/gcc/config/rs6000/rs6000-string.c b/gcc/config/rs6000/rs6000-string.c index ff0414586d0..9c25bad97a1 100644 --- a/gcc/config/rs6000/rs6000-string.c +++ b/gcc/config/rs6000/rs6000-string.c @@ -2205,6 +2205,7 @@ emit_final_str_compare_vec (rtx str1, rtx str2, rtx result, } else { + gcc_assert (TARGET_P8_VECTOR); rtx diffix = gen_reg_rtx (DImode); rtx result_gbbd = gen_reg_rtx (V16QImode); /* Since each byte of the input is either 00 or FF, the bytes in @@ -2313,9 +2314,12 @@ expand_strn_compare (rtx operands[], int no_length) /* Is it OK to use vec/vsx for this. TARGET_VSX means we have at least POWER7 but we use TARGET_EFFICIENT_UNALIGNED_VSX which is at least POWER8. That way we can rely on overlapping compares to - do the final comparison of less than 16 bytes. Also I do not want - to deal with making this work for 32 bits. */ - int use_vec = (bytes >= 16 && !TARGET_32BIT && TARGET_EFFICIENT_UNALIGNED_VSX); + do the final comparison of less than 16 bytes. Also I do not + want to deal with making this work for 32 bits. In addition, we + have to make sure that we have at least P8_VECTOR (we don't allow + P9_VECTOR without P8_VECTOR). */ + int use_vec = (bytes >= 16 && !TARGET_32BIT + && TARGET_EFFICIENT_UNALIGNED_VSX && TARGET_P8_VECTOR); if (use_vec) required_align = 16;