From: Dave Airlie Date: Thu, 9 Nov 2017 01:00:50 +0000 (+0000) Subject: ac/nir: add support for all intrinsics. (v2) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6bec8bcd79ed8bb3e3d5b56891df0fc5bf5e8cd3;p=mesa.git ac/nir: add support for all intrinsics. (v2) This is derived from tgsi/radeonsi code from the GLSL intrinsics. This should pre-fix radv for the upcoming spirv patches. v2: actually use wait_cnt, sleep deprived dad time! (Bas) Reviewed-by: Bas Nieuwenhuizen Signed-off-by: Dave Airlie --- diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 2ae656693fc..f922b32bf7b 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -3654,6 +3654,31 @@ static void emit_waitcnt(struct nir_to_llvm_context *ctx, ctx->ac.voidt, args, 1, 0); } +static void emit_membar(struct nir_to_llvm_context *ctx, + const nir_intrinsic_instr *instr) +{ + unsigned waitcnt = NOOP_WAITCNT; + + switch (instr->intrinsic) { + case nir_intrinsic_memory_barrier: + case nir_intrinsic_group_memory_barrier: + waitcnt &= VM_CNT & LGKM_CNT; + break; + case nir_intrinsic_memory_barrier_atomic_counter: + case nir_intrinsic_memory_barrier_buffer: + case nir_intrinsic_memory_barrier_image: + waitcnt &= VM_CNT; + break; + case nir_intrinsic_memory_barrier_shared: + waitcnt &= LGKM_CNT; + break; + default: + break; + } + if (waitcnt != NOOP_WAITCNT) + emit_waitcnt(ctx, waitcnt); +} + static void emit_barrier(struct nir_to_llvm_context *ctx) { /* SI only (thanks to a hw bug workaround): @@ -4144,7 +4169,12 @@ static void visit_intrinsic(struct ac_nir_context *ctx, emit_discard_if(ctx, instr); break; case nir_intrinsic_memory_barrier: - emit_waitcnt(ctx->nctx, VM_CNT); + case nir_intrinsic_group_memory_barrier: + case nir_intrinsic_memory_barrier_atomic_counter: + case nir_intrinsic_memory_barrier_buffer: + case nir_intrinsic_memory_barrier_image: + case nir_intrinsic_memory_barrier_shared: + emit_membar(ctx->nctx, instr); break; case nir_intrinsic_barrier: emit_barrier(ctx->nctx);