From: cand@51b69dee28eeccfe0f04790433b843689895c6e3 <cand@web>
Date: Thu, 10 Dec 2020 17:59:18 +0000 (+0000)
Subject: VSX overview, part 1
X-Git-Tag: convert-csv-opcode-to-binary~1430
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6c16b245dd5458ffadc0180f18b9b1b8c0f842cf;p=libreriscv.git

VSX overview, part 1
---

diff --git a/openpower/sv/av_opcodes.mdwn b/openpower/sv/av_opcodes.mdwn
index e21a388c1..478f087c0 100644
--- a/openpower/sv/av_opcodes.mdwn
+++ b/openpower/sv/av_opcodes.mdwn
@@ -40,34 +40,21 @@ TODO
 
 # VSX SIMD
 
-## vpkpx
+Useful parts of VSX, and how they might map.
 
-vpkpx is a 32-bit to 16-bit 8888 into 1555 conversion
+## vpks[\*][\*]s (vec_pack*)
 
-SV notes:
+signed and unsigned, these are N-to-M (N=64/32/16, M=32/16/8) chop/clamp/sign/zero-extend operations. May be implemented by a clamped move to a smaller elwidth.
 
-a single 32-bit to 16-bit operation should suffice, fitting cleanly into one single scalar op:
-
-    dest[0]     = src[7]
-    dest[1 : 5] = src[8 :12]
-    dest[6 :10] = src[16:20]
-    dest[11:15] = src[24:28]
-
-## vpks[\*][\*]s
-
-signed and unsigned, these are N-to-M (N=64/32/16, M=32/16/8) chop/clamp/sign/zero-extend operations
+The other direction, vec_unpack widening ops, may need some way to tell whether to sign-extend or zero-extend.
  
-## vupkhpx / vupklpx
-
-these are 16-bit to 32-bit 1555 to 8888 conversion
-
-## vavgs\*
+## vavgs\* (vec_avg)
 
 signed and unsigned, 8/16/32: these are all of the form:
 
     result = truncate((a + b + 1) >> 1))
 
-## vabsdu\*
+## vabsdu\* (vec_abs)
 
 unsigned 8/16/32: these are all of the form: