From: Benjamin Herrenschmidt Date: Fri, 12 Jun 2020 11:47:06 +0000 (+1000) Subject: bram: Remove combinational loop on stall X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6c3a8bf4171173c87d694d6721464c8e2f6423a6;p=microwatt.git bram: Remove combinational loop on stall It hurts timing and is pointless Signed-off-by: Benjamin Herrenschmidt --- diff --git a/soc.vhdl b/soc.vhdl index 23d3885..7c8e825 100644 --- a/soc.vhdl +++ b/soc.vhdl @@ -609,7 +609,7 @@ begin no_bram: if MEMORY_SIZE = 0 generate wb_bram_out.ack <= wb_bram_in.cyc and wb_bram_in.stb; wb_bram_out.dat <= x"FFFFFFFFFFFFFFFF"; - wb_bram_out.stall <= wb_bram_in.cyc and not wb_bram_out.ack; + wb_bram_out.stall <= not wb_bram_out.ack; end generate; -- DMI(debug bus) <-> JTAG bridge