From: lkcl Date: Mon, 25 Jan 2021 23:20:47 +0000 (+0000) Subject: (no commit message) X-Git-Tag: convert-csv-opcode-to-binary~316 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6c560db9c53b54ffb3c326e1438bf77518dbb433;p=libreriscv.git --- diff --git a/22nm_PowerPI.mdwn b/22nm_PowerPI.mdwn index ee07514f7..e2ba7cb4c 100644 --- a/22nm_PowerPI.mdwn +++ b/22nm_PowerPI.mdwn @@ -1,14 +1,15 @@ # Introduction -This is a page describing a proposed mass-volume SoC (minimum 1 million -units for commercial viability). It outlines: +This is a page describing a proposed mass-volume SoC. It outlines: -* the NREs involved (realistically USD $12m) +* the NREs involved (realistically USD $7m, with headroom up to $12m preferred) * proposes a fair market price (around $12-13) * estimates a manufacturing cost (around $3.50 to $4) * realistic industry-standard timescales (12-18 months). -Several ways in which this may be achieved include: +On that basis it indicates that commercial viability is possible if the +quantities ordered are over 1 million units. +Several ways in which the NREs may be covered in order to be viable include: * VC investors (typically requires multiple LOIs and customer committments) * European Union Grants (such as [SiPearl](https://www.eenewsanalog.com/news/european-processor-startup-gets-eu62-million-kickstart-grant) and the [EPI](https://www.european-processor-initiative.eu/dissemination-material/epi-consortium-members-list/) )