From: Luke Kenneth Casson Leighton Date: Wed, 2 Sep 2020 14:00:30 +0000 (+0100) Subject: rename ambiguous X-Form "L" fields to L,L1,L2,L3 X-Git-Tag: convert-csv-opcode-to-binary~2189 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6cc6c5cd5184f8c270039d1843858c693492e22d;p=libreriscv.git rename ambiguous X-Form "L" fields to L,L1,L2,L3 --- diff --git a/openpower/isa/fixedarith.mdwn b/openpower/isa/fixedarith.mdwn index aa3c0fd83..fe3350fed 100644 --- a/openpower/isa/fixedarith.mdwn +++ b/openpower/isa/fixedarith.mdwn @@ -539,11 +539,11 @@ Special Registers Altered: X-Form -* darn RT,L +* darn RT,L3 Pseudo-code: - RT <- random(L) + RT <- random(L3) Special Registers Altered: diff --git a/openpower/isa/sprset.mdwn b/openpower/isa/sprset.mdwn index 00af71f59..6bef234c6 100644 --- a/openpower/isa/sprset.mdwn +++ b/openpower/isa/sprset.mdwn @@ -146,11 +146,11 @@ Special Registers Altered: X-Form -* mtmsr RS,L +* mtmsr RS,L1 Pseudo-code: - if L = 0 then + if L1 = 0 then MSR[48] <- (RS)[48] | (RS)[49] MSR[58] <- (RS)[58] | (RS)[49] MSR[59] <- (RS)[59] | (RS)[49] @@ -171,11 +171,11 @@ Special Registers Altered: X-Form -* mtmsrd RS,L +* mtmsrd RS,L1 Pseudo-code: - if L = 0 then + if L1 = 0 then if (MSR[29:31] != 0b010) | ((RS)[29:31] != 0b000) then MSR[29:31] <- (RS)[29:31] MSR[48] <- (RS)[48] | (RS)[49] diff --git a/openpower/isatables/fields.text b/openpower/isatables/fields.text index df38b6c74..7f397a59d 100644 --- a/openpower/isatables/fields.text +++ b/openpower/isatables/fields.text @@ -57,7 +57,7 @@ | OPCD | RS | /|SR | /// | XO | / | | OPCD | RS | /// | RB | XO | / | | OPCD | RS | /// | /// | XO | / | - | OPCD | RS | /// |L | /// | XO | / | + | OPCD | RS | /// |L1| /// | XO | / | | OPCD | TH | RA | RB | XO | / | | OPCD | BF |/ | L | RA | RB | XO | / | | OPCD | BF |// | FRA | FRB | XO | / | @@ -67,10 +67,10 @@ | OPCD | TH | RA | RB | XO | / | | OPCD | /| CT | /// | /// | XO | / | | OPCD | /| CT | RA | RB | XO | / | - | OPCD | /// | L | RA | RB | XO | / | - | OPCD | /// | L | /// | RB | XO | / | - | OPCD | /// | L | /// | /// | XO | / | - | OPCD | /// | L | /| E | /// | XO | / | + | OPCD | /// | L2 | RA | RB | XO | / | + | OPCD | /// | L2 | /// | RB | XO | / | + | OPCD | /// | L2 | /// | /// | XO | / | + | OPCD | /// | L2 | /| E | /// | XO | / | | OPCD | TO | RA | RB | XO | / | | OPCD | FRT | RA | RB | XO | / | | OPCD | FRT | FRA | FRB | XO | / | @@ -102,6 +102,7 @@ | OPCD | VRT | RA | RB | XO | / | | OPCD | VRS | RA | RB | XO | / | | OPCD | MO | /// | /// | XO | / | + | OPCD | RT | /// |L3 | /// | XO | / | # 1.6.8 XL-FORM |0 |6 |9 |11 |14 |16 |19|20|21 |31 | @@ -488,7 +489,7 @@ Field used to specify whether the mtfsf instruction updates the entire FPSCR. Formats: XFL - L (9:10) + L2 (9:10) Field used by the Data Cache Block Flush instruc- tion (see Section 4.3.2 of Book II) and also by the Synchronize instruction (see Section 4.6.3 of Book @@ -502,14 +503,14 @@ to indicate whether to compare against 1 or 2 ranges of bytes. Formats: D, X - L (15) + L1 (15) Field used by the Move To Machine State Register instruction (see Book III). Field used by the SLB Move From Entry VSID and SLB Move From Entry ESID instructions for imple- mentation-specific purposes. Formats: X - L (14:15) + L3 (14:15) Field used by the Deliver A Random Number instruction (see Section 3.3.9, 'Fixed-Point Arith- metic Instructions') to choose the random number